US5158912A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integral heatsink semiconductor package
Assignee: Hewlett Packard Development Co LP
•
Filing: 1991-04-09
•
Granted: 1992-10-27
•
Expires: 2011-04-09
Abstract
Abstract An injection molded aluminum nitride heatsink forms the substrate of an integral heatsink semiconductor package in which a semiconductor chip is attached directly to the integrated heatsink forming an intimate thermal relationship between the heat generating source and the heat dissipating means. In a first embodiment, a planar surface of the heatsink component provides the substrate for the attachment of a semiconductor chip and a multilayer housing formed from a plurality of layers of dielectric glass ceramic lamina and conductive circuit layers. The multilayer housing is formed on top of the heatsink substrate creating a recessed cavity in which the semiconductor die sits and is attached directly to the heatsink. The semiconductor chip is attached to the circuit layers of the housing through any of the known electrical connection methods, such as wirebonding or tab tape. A cover plate is mounted over the cavity. In a second embodiment a recessed cavity with a planar surface is formed directly in the heatsink and the semiconductor chip is mounted directly to the surface within the cavity. A plurality of tab leads are connected to the semiconductor and a cover plate is mounted over the cavity sealing the semiconductor and its electrical connections inside.
Inventors
- 👤 Dave Kellerman
- 👤 Robert J. Hannemann
- 👤 Stanley J. Czerepak
- 👤 Robert J. Simcoe
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 17:53
CPC Classifications
H; H10; H10W; H10W95/00; H10W40/00; H10W40/20; H10W40/25; H10W40/259; H10W70/00; H10W70/01; H10W70/05; H10W70/098; H10W74/00; H10W90/00; H10W90/701; H10W90/751; H10W90/754; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49155; Y10T29/49163
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
336 words
A method of fabricating an integral heatsink semiconductor package comprising the steps of: providing an injection molded aluminum nitride heatsink having a first planar surface and a second opposing surface having heat dissipating means thereon; providing a plurality of layers of conductive metal etchings comprising at least one ground layer, at least one power layer and at least one signal layer; providing a plurality of dielectric lamina having at least one central aperture and a predetermined system of via formed therein, said plurality of lamina configured, dimensioned and arranged as to create at least one tiered cavity when laminated together; laminating one of said plurality of dielectric lamina to said first planar surface of said heatsink; filling said via of said lamina with conductive metal for the interconnection of said layers of said metal etching; screen printing one of said plurality of layers of metal etching onto said laminated lamina; repeating the steps of laminating, filling and screen printing until said process forms a multilayer housing on said first surface of said heatsink, said housing having at least one tiered cavity formed therein, said tiers exposing selected ends of said metal etching and forming a shelf for the attachment of a cover, said housing further having an external layer of lamina; providing metal contact pads for the interconnection of said semiconductor package with a printed wiring board; screen printing said contact pads on said external layer of lamina; firing said structure under sufficient temperature and pressure to bond said heatsink and said lamina together; providing at least one semiconductor chip; attaching said at least one semiconductor chip to said first surface of said heatsink within said recessed cavity of said housing; providing means for connecting said at least one semiconductor chip to said exposed ends of said metal etchings; connecting said semiconductor to said exposed ends of said metal etchings using said connecting means; providing at least one cover plate; mounting said cover plate over said recessed cavity of said housing; and sealing said cover plate.
Claim 2
Independent Claim
336 words
A method of fabricating an integral heatsink semiconductor package comprising the steps of: providing an injection molded aluminum nitride heatsink having a first planar surface and a second opposing surface having heat dissipating means thereon; providing a plurality of layers of conductive metal etchings comprising at least one ground layer, at least one power layer and at least one signal layer; providing a plurality of dielectric lamina having at least one central aperture and a predetermined system of via formed therein, said plurality of lamina configured, dimensioned and arranged as to create at least one tiered cavity when laminated together; laminating one of said plurality of dielectric lamina to said first planar surface of said heatsink; filling said via of said lamina with conductive metal for the interconnection of said layers of said metal etching; screen printing one of said plurality of layers of metal etching onto said laminated lamina; repeating the steps of laminating, filling and screen printing until said process forms a multilayer housing on said first surface of said heatsink, said housing having at least one tiered cavity formed therein, said tiers exposing selected ends of said metal etching and forming a shelf for the attachment of a cover, said housing further having an external layer of lamina; providing metal contact pads for the interconnection of said semiconductor package with a printed wiring board; screen printing said contact pads on said external layer of lamina; firing said structure under sufficient temperature and pressure to bond said heatsink and said lamina together; providing at least one semiconductor chip; attaching said at least one semiconductor chip to said first surface of said heatsink within said recessed cavity of said housing; providing means for connecting said at least one semiconductor chip to said exposed ends of said metal etchings; connecting said semiconductor to said exposed ends of said metal etchings using said connecting means; providing at least one cover plate; mounting said cover plate over said recessed cavity of said housing; and sealing said cover plate.
Claim 3
Dependent Claim
37 words
A method of fabricating an integral heatsink semiconductor package according to claim 1, wherein said means for connecting said at least one semiconductor chip to said exposed ends of said metal etchings is a set of wirebonds.
Claim 4
Dependent Claim
35 words
A method of fabricating an integral heatsink semiconductor package according to claim 1, wherein said means for connecting said at least one semiconductor chip to said exposed ends of said metal etchings is tab tape.
Claim 5
Independent Claim
347 words
A method of fabricating an integral heatsink semiconductor package comprising the steps of: providing an injection molded aluminum nitride heatsink having a first planar surface and a second opposing surface having heat dissipating means thereon; providing a plurality of electrically conductive circuit layers patterned to form a plurality of signal transmission lines, said plurality of circuit layers comprising at least one ground layer, at least one power layer and at least one signal layer; providing a plurality of dielectric lamina having at least one central aperture and a predetermined system of via formed therein, said plurality of lamina configured, dimensioned and arranged as to create at least one tiered cavity when laminated together; laminating one of said plurality of dielectric lamina to said first planar surface of said heatsink; filling said via of said lamina with conductive metal for the interconnection of said circuit layers; screen printing one of said plurality of circuit layers onto said laminated lamina; repeating the steps of laminating, filling and screen printing until said process forms a multilayer housing on said first surface of said heatsink, said housing having at least one tiered cavity formed therein, said tiers exposing selected ends of said signal transmission lines and forming a shelf for the attachment of a cover, said housing further having an external layer of lamina; providing metal contact pads for the interconnection of said semiconductor package with a printed wiring board; screen printing said contact pads on said external layer of lamina; firing said structure under sufficient temperature and pressure to bond said heatsink and said lamina together; providing at least one semiconductor chip; attaching said at least one semiconductor chip to said first surface of said heatsink within said recessed cavity of said housing; providing means for connecting said at least one semiconductor chip to said exposed ends of said signal transmission lines; connecting said semiconductor to said exposed ends of said signal transmission lines using said connecting means; providing at least one cover plate; mounting said cover plate over said recessed cavity of said housing; and sealing said cover plate.
Claim 6
Independent Claim
347 words
A method of fabricating an integral heatsink semiconductor package comprising the steps of: providing an injection molded aluminum nitride heatsink having a first planar surface and a second opposing surface having heat dissipating means thereon; providing a plurality of electrically conductive circuit layers patterned to form a plurality of signal transmission lines, said plurality of circuit layers comprising at least one ground layer, at least one power layer and at least one signal layer; providing a plurality of dielectric lamina having at least one central aperture and a predetermined system of via formed therein, said plurality of lamina configured, dimensioned and arranged as to create at least one tiered cavity when laminated together; laminating one of said plurality of dielectric lamina to said first planar surface of said heatsink; filling said via of said lamina with conductive metal for the interconnection of said circuit layers; screen printing one of said plurality of circuit layers onto said laminated lamina; repeating the steps of laminating, filling and screen printing until said process forms a multilayer housing on said first surface of said heatsink, said housing having at least one tiered cavity formed therein, said tiers exposing selected ends of said signal transmission lines and forming a shelf for the attachment of a cover, said housing further having an external layer of lamina; providing metal contact pads for the interconnection of said semiconductor package with a printed wiring board; screen printing said contact pads on said external layer of lamina; firing said structure under sufficient temperature and pressure to bond said heatsink and said lamina together; providing at least one semiconductor chip; attaching said at least one semiconductor chip to said first surface of said heatsink within said recessed cavity of said housing; providing means for connecting said at least one semiconductor chip to said exposed ends of said signal transmission lines; connecting said semiconductor to said exposed ends of said signal transmission lines using said connecting means; providing at least one cover plate; mounting said cover plate over said recessed cavity of said housing; and sealing said cover plate.
Claim 7
Dependent Claim
37 words
A method of fabricating an integral heatsink semiconductor package according to claim 4, wherein said means for connecting said at least one semiconductor chip to said exposed ends of said metal etchings is a set of wirebonds.
Claim 8
Dependent Claim
35 words
A method of fabricating an integral heatsink semiconductor package according to claim 4, wherein said means for connecting said at least one semiconductor chip to said exposed ends of said metal etchings is tab tape.
References Cited (Backward Citations)
US4435480A
Cited
US4624896A
Cited
US4659611A
Cited
US4645552A
Cited
US4712609A
Cited
US4695517A
Cited
US4724283A
Cited
US4770953A
Cited
US4804823A
Cited
US4839717A
Cited
US4987478A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-10-27 | 1996-04-27 | 1996-10-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-10-27 | 2000-04-27 | 2000-10-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-10-27 | 2004-04-27 | 2004-10-27 | $7700.00 | Window Closed / Lapsed |