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US5160907A Expired / Lapsed US ⏱️ 0.0 years remaining

Multiple layer semiconductor circuit module

Assignee: Mitsubishi Electric Corp
•
Filing: 1991-08-30
•
Granted: 1992-11-03
•
Expires: 2011-08-30
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Abstract

Abstract A multiple layer semiconductor circuit module includes a semiconductor substrate including opposed first and second surfaces and side walls; a first circuit disposed on the first surface of the substrate including a plurality of conductors, at least one of the conductors extending on the first surface of the substrate to one of the side walls; a first electrically insulating layer disposed on the first surface of the substrate, covering the first circuit, and including a second surface adjacent to the first surface of the substrate, an opposed first surface, and side walls; a second circuit disposed on the first surface of the first layer including a plurality of conductors, at least one of the conductors extending on the first surface of the first layer to one of the side walls; a second electrically insulating layer disposed on the first surface of the first layer, covering the second circuit, and including a second surface adjacent to the first surface of the first layer, an opposed first surface, and side walls; a third circuit disposed on the first surface of the second layer including a plurality of conductors, at least one of the conductors extending on the first surface of the second layer to one of the side walls; and at least one electrical conductor disposed on at least one of the side walls of the substrate and the first and second insulating layers electrically interconnecting the first, second, and third circuits.

Inventors

  • 👤 Yasuharu Nakajima
  • 👤 Akira Inoue

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 03:33
CPC Classifications
H; H10; H10W; H10W44/00; H10W44/20; H10W70/00; H10W70/60; H10W70/67; H10W70/68; H10W70/685; H10W72/00

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 290 words
A multiple layer semiconductor circuit module comprising: a semiconductor substrate including opposed first and second surfaces and side walls transverse to the first and second surfaces; a first circuit disposed on the first surface of the substrate including a plurality of conductors, at least one of the conductors extending on the first surface of the substrate to one of the side walls of the substrate; a first electrically insulating layer disposed on the first surface of the substrate, covering the first circuit, and including a second surface adjacent to the first surface of the substrate an opposed first surface, and side walls substantially continuous with the side walls of the substrate; a second circuit disposed on the first surface of the first electrically insulating layer including a plurality of conductors, at least one of the conductors extending on the first surface of the first insulating layer to one of the side walls of the first insulating layer; a second electrically insulating layer disposed on the first surface of the first electrically insulating layer, covering the second circuit, and including a second surface adjacent to the first surface of the first electrically insulating layer an opposed first surface, and side walls substantially continuous with the side walls of the insulating layer; a third circuit disposed on the first surface of the second electrically insulating layer including a plurality of conductors, at least one of the conductors extending on the first surface of the second insulating layer to one of the side walls of the second insulating layer; and at least one electrical conductor disposed on at least one of the side walls of the substrate and the first and second electrically insulating layers electrically interconnecting the first, second, and third circuits.
Claim 2
Dependent Claim 290 words
A multiple layer semiconductor circuit module comprising: a semiconductor substrate including opposed first and second surfaces and side walls transverse to the first and second surfaces; a first circuit disposed on the first surface of the substrate including a plurality of conductors, at least one of the conductors extending on the first surface of the substrate to one of the side walls of the substrate; a first electrically insulating layer disposed on the first surface of the substrate, covering the first circuit, and including a second surface adjacent to the first surface of the substrate an opposed first surface, and side walls substantially continuous with the side walls of the substrate; a second circuit disposed on the first surface of the first electrically insulating layer including a plurality of conductors, at least one of the conductors extending on the first surface of the first insulating layer to one of the side walls of the first insulating layer; a second electrically insulating layer disposed on the first surface of the first electrically insulating layer, covering the second circuit, and including a second surface adjacent to the first surface of the first electrically insulating layer an opposed first surface, and side walls substantially continuous with the side walls of the insulating layer; a third circuit disposed on the first surface of the second electrically insulating layer including a plurality of conductors, at least one of the conductors extending on the first surface of the second insulating layer to one of the side walls of the second insulating layer; and at least one electrical conductor disposed on at least one of the side walls of the substrate and the first and second electrically insulating layers electrically interconnecting the first, second, and third circuits.
Claim 3
Dependent Claim 31 words
The module of claim 1 including a plurality of electrical conductors disposed on at least one of the side walls of the substrate and the first and second electrically insulating layers.
Claim 4
Dependent Claim 24 words
The module of claim 2 wherein the plurality of electrical conductors includes a signal conductor and a grounding conductor together forming a slot line.
Claim 5
Dependent Claim 28 words
The module of claim 2 including at least one signal conductor and two grounding conductors disposed on opposite sides of the signal conductor together forming a coplanar waveguide.
Claim 6
Dependent Claim 39 words
The module of claim 2 including a passive electrical component mounted on a side wall of one of the first and second electrically insulating layers and connected to at least two of the electrical conductors on the side wall.
Claim 7
Dependent Claim 13 words
The module of claim 5 wherein the passive electrical component is a capacitor.
Claim 8
Dependent Claim 13 words
The module of claim 5 wherein the passive electrical component is a resistor.
Claim 9
Dependent Claim 30 words
The module of claim 5 including an electrically insulating film disposed on the side wall covering the passive electrical component and at least part of the plurality of electrical conductors.
Claim 10
Dependent Claim 25 words
The module of claim 2 including an electrically insulating film disposed on the side wall covering at least part of the plurality of electrical conductors.
Claim 11
Dependent Claim 47 words
The module of claim 1 including at least one electrically conducting projecting electrode contacting an electrical conductor disposed on the side wall of at least one of the first and second electrically insulating layers and extending from the side wall for electrically interconnecting the module to another.
Claim 12
Dependent Claim 37 words
The module of claim 10 including an electrically insulating film disposed on the side wall of the first and second electrically insulating layers covering the electrical conductor and leaving at least one electrically conducting projection electrode exposed.
Claim 13
Dependent Claim 18 words
The module of claim 1 including a grounding electrode disposed on the second surface of the semiconductor substrate.
Claim 14
Dependent Claim 41 words
The module of claim 12 including a grounding conductor disposed on the side wall of the semiconductor substrate and on a side wall of at least one of the first and second electrically insulating layers electrically connected to the grounding electrode.
Claim 15
Dependent Claim 22 words
The module of claim 1 including at least one electrical conductor disposed on the first surface of the second electrically insulating layer.
Claim 16
Dependent Claim 42 words
The module of claim 14 wherein the electrical conductor on the first surface of the second electrically insulating layer is connected to an electrical conductor disposed on at least one of the side walls of the first and second electrically insulating layers.
Claim 17
Dependent Claim 22 words
The module of claim 14 including a plurality of electrical conductors disposed on the first surface of the second electrically insulating layer.
Claim 18
Dependent Claim 26 words
The module of claim 16 wherein the plurality of electrical conductors includes a signal conductor and at least one grounding conductor together forming a slot line.
Claim 19
Dependent Claim 28 words
The module of claim 16 including at least one signal conductor and two grounding conductors disposed on opposite sides of the signal conductor together forming a coplanar waveguide.
Claim 20
Dependent Claim 18 words
The module of claim 16 including a grounding electrode disposed on the second surface of the semiconductor substrate.
Claim 21
Dependent Claim 41 words
The module of claim 19 including a grounding conductor disposed on the side surface of the semiconductor substrate and on the side surface of at least one of the first and second electrically insulating layers electrically connected to the grounding electrode.
Claim 22
Dependent Claim 22 words
The module of claim 1 wherein the semiconductor substrate is chosen from the group consisting of silicon, gallium arsenide, and indium phosphide.

References Cited (Backward Citations)

US4110712A Cited
JPS60114004A Cited
JPS6350102A Cited
US4967171A Cited
US4906953A Cited
US5093639A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-11-03 1996-05-04 1996-11-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-11-03 2000-05-04 2000-11-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-11-03 2004-05-04 2004-11-03 $7700.00 Window Closed / Lapsed

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