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US5173448A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for fabricating a semiconductor device

Assignee: Sharp Corp
•
Filing: 1991-11-14
•
Granted: 1992-12-22
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Expires: 2011-11-14
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Abstract

Abstract The present invention provides a process for fabricating a semiconductor device including the steps of: depositing a CVD film by a bias ECRCVD process on a wiring layer having an intended contact region in which a wiring line are made wider than in other regions; coating planarly the CVD film with a resist film; etching the resist film back so as to expose a protuberance of the CVD film formed above the inteded contact region; and etching the protuberance and the CVD film thereunder to open a contact hole down to the intended contact region of the wiring layer.

Inventors

  • 👤 Masahiko Yanagi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 09:57
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/092

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 95 words
A process for fabricating a semiconductor device comprising the steps of: depositing a CVD film by a bias ECRCVD process on a wiring layer having an intended contact region in which a wiring line is made wider than in other regions; coating planarly the CVD film with a resist film; etching the resist film back so as to expose a protuberance of the CVD film formed above the intended contact region; and etching the protuberance and the CVD film thereunder to open a contact hole down to the intended contact region of the wiring layer.
Claim 2
Dependent Claim 95 words
A process for fabricating a semiconductor device comprising the steps of: depositing a CVD film by a bias ECRCVD process on a wiring layer having an intended contact region in which a wiring line is made wider than in other regions; coating planarly the CVD film with a resist film; etching the resist film back so as to expose a protuberance of the CVD film formed above the intended contact region; and etching the protuberance and the CVD film thereunder to open a contact hole down to the intended contact region of the wiring layer.
Claim 3
Dependent Claim 27 words
A process as set forth in claim 1, wherein the thickness of the CVD film is 4500-6500 Å; and the height of the protuberance is 1000-2000 Å.

References Cited (Backward Citations)

JPS61288442A Cited
US4910169A Cited
US4859618A Cited
JPH0223748A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-12-22 1996-06-22 1996-12-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-12-22 2000-06-22 2000-12-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-12-22 2004-06-22 2004-12-22 $7700.00 Window Closed / Lapsed

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