Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
157 words
A method for ensuring CRC error generation by a data communication station experiencing a transmitter exception during a transmission of a frame, the frame having a predetermined number of data bytes, comprising the steps of: presetting a parity bit to a binary one, said parity bit toggled in response to each successive binary one transmitted by the data communication station; transmitting the data bytes of the frame sequentially from a first data byte to a next-to-last data byte, said next-to-last data byte occurring immediately before a last data byte during which the transmitter exception occurs; transmitting a first seven data bits of said last data byte; transmitting said parity bit in place of an eighth bit of said last data byte; and transmitting continuously a predetermined character having even parity until a total number of bytes transmitted is equal to the predetermined number of data bytes plus two, a last two predetermined characters providing an erroneous CRC.
Claim 2
Independent Claim
157 words
A method for ensuring CRC error generation by a data communication station experiencing a transmitter exception during a transmission of a frame, the frame having a predetermined number of data bytes, comprising the steps of: presetting a parity bit to a binary one, said parity bit toggled in response to each successive binary one transmitted by the data communication station; transmitting the data bytes of the frame sequentially from a first data byte to a next-to-last data byte, said next-to-last data byte occurring immediately before a last data byte during which the transmitter exception occurs; transmitting a first seven data bits of said last data byte; transmitting said parity bit in place of an eighth bit of said last data byte; and transmitting continuously a predetermined character having even parity until a total number of bytes transmitted is equal to the predetermined number of data bytes plus two, a last two predetermined characters providing an erroneous CRC.
Claim 3
Dependent Claim
13 words
The method of claim 1 wherein said predetermined character is a SYNC character.
Claim 4
Dependent Claim
13 words
The method of claim 1 wherein said predetermined character is an IDLE character.
Claim 5
Independent Claim
161 words
A method for ensuring CRC error generation by a data communication station experiencing a transmitter exception during a transmission of a frame, the frame having a predetermined number of data bytes, comprising the steps of: presetting a parity bit to a binary one, said parity bit toggled in response to each successive binary one transmitted by the data communication station; transmitting a first seven bits followed by an eighth bit of each successive byte of the frame if the transmitter exception has not occurred before said eight bit of the corresponding byte is transmitted; transmitting said first seven bits of a byte of the frame if the transmitter exception has occurred before said eighth bit of the corresponding byte is transmitted; transmitting said parity bit; and transmitting continuously a predetermined character having even parity until a total number of bytes transmitted is equal to the predetermined number of data bytes plus two, a last two predetermined characters providing an erroneous CRC.
Claim 6
Independent Claim
161 words
A method for ensuring CRC error generation by a data communication station experiencing a transmitter exception during a transmission of a frame, the frame having a predetermined number of data bytes, comprising the steps of: presetting a parity bit to a binary one, said parity bit toggled in response to each successive binary one transmitted by the data communication station; transmitting a first seven bits followed by an eighth bit of each successive byte of the frame if the transmitter exception has not occurred before said eight bit of the corresponding byte is transmitted; transmitting said first seven bits of a byte of the frame if the transmitter exception has occurred before said eighth bit of the corresponding byte is transmitted; transmitting said parity bit; and transmitting continuously a predetermined character having even parity until a total number of bytes transmitted is equal to the predetermined number of data bytes plus two, a last two predetermined characters providing an erroneous CRC.
Claim 7
Dependent Claim
202 words
A communication controller of a data communication station, implementing a predetermined protocol, comprising: a first-in, first-out memory having a data input for receiving input data, a data output, and a control output port for indicating an underrun condition; a parallel-to-serial shift register having an input coupled to said data output of said first-in, first-out memory, and an output; a parity bit generator having a data input coupled to said output of said parallel-to-serial shift register, a preset input for receiving a preset signal, and an output; a multiplexer having a first input coupled to said output of said parity bit generator, a second input coupled to said output of said parallel-to-serial shift register, a control input terminal for receiving a data/parity signal, and an output for providing a transmit data output signal; and a controller coupled to said first-in, first-out memory, to said parity bit generator, and to said multiplexer, for providing said preset signal to said parity bit generator as a beginning of a predetermined portion of a frame, and for providing said data/parity signal to select said first input of said multiplexer during an eighth bit of a byte in response to said first-in, first-out memory indicating said underrun condition.
Claim 8
Dependent Claim
202 words
A communication controller of a data communication station, implementing a predetermined protocol, comprising: a first-in, first-out memory having a data input for receiving input data, a data output, and a control output port for indicating an underrun condition; a parallel-to-serial shift register having an input coupled to said data output of said first-in, first-out memory, and an output; a parity bit generator having a data input coupled to said output of said parallel-to-serial shift register, a preset input for receiving a preset signal, and an output; a multiplexer having a first input coupled to said output of said parity bit generator, a second input coupled to said output of said parallel-to-serial shift register, a control input terminal for receiving a data/parity signal, and an output for providing a transmit data output signal; and a controller coupled to said first-in, first-out memory, to said parity bit generator, and to said multiplexer, for providing said preset signal to said parity bit generator as a beginning of a predetermined portion of a frame, and for providing said data/parity signal to select said first input of said multiplexer during an eighth bit of a byte in response to said first-in, first-out memory indicating said underrun condition.
Claim 9
Dependent Claim
31 words
The communication controller of claim 5 wherein the predetermined protocol specifies the transmission of a cyclic redundancy check having even parity at an end of a portion of a data frame.
Claim 10
Dependent Claim
12 words
The communication controller of claim 6 wherein the predetermined protocol is DDCMP.
Claim 11
Dependent Claim
91 words
The communication controller of claim 5 wherein said parity bit generator comprises: a exclusive-OR gate having a first input coupled to said output of said parallel-to-serial shift register, a second input, and an output; and a flip-flop having an input terminal coupled to said output terminal of said exclusive-OR gate, a clock input terminal for receiving a clock signal, a preset input terminal for receiving said preset signal, and an output terminal coupled to said second input terminal of said exclusive-OR gate and to said first input terminal of said multiplexer.