Method of manufacturing nonvolatile semiconductor memory device

Claim 1

A method of manufacturing a nonvolatile semiconductor memory device comprising the steps of: forming source and drain regions on a surface region of a semiconductor substrate; forming a first insulation film on a channel region located between the source and drain regions; forming a first gate electrode on the first insulation film; forming a second insulation film on the first gate electrode; forming a second gate electrode on the second insulation film; forming a third insulation film and a fourth insulation film on the substrate and on the second gate electrode; forming contact holes extending to the source and drain regions; and forming a first wiring layer on the third and fourth insulation films and in contact with the source and drain regions within the contact holes; forming a fifth insulation film on the fourth insulation film and the wiring layer; planarizing a surface of the fifth insulation film; and forming a sixth, substantially planar mobile ion gettering insulation film on the fifth insulation film.

Claim 2

A method of manufacturing a nonvolatile semiconductor memory device comprising the steps of: forming source and drain regions on a surface region of a semiconductor substrate; forming a first insulation film on a channel region located between the source and drain regions; forming a first gate electrode on the first insulation film; forming a second insulation film on the first gate electrode; forming a second gate electrode on the second insulation film; forming a third insulation film and a fourth insulation film on the substrate and on the second gate electrode; forming contact holes extending to the source and drain regions; and forming a first wiring layer on the third and fourth insulation films and in contact with the source and drain regions within the contact holes; forming a fifth insulation film on the fourth insulation film and the wiring layer; planarizing a surface of the fifth insulation film; and forming a sixth, substantially planar mobile ion gettering insulation film on the fifth insulation film.

Claim 10

A method of manufacturing a nonvolatile semiconductor memory device comprising the steps of: forming a first insulation film on a surface of a semiconductor substrate; forming a first conductive film on said first insulation film; forming a second insulation film on said first conductive film; forming a second conductive film on said second insulation film; patterning said first and second insulation films and said first and second conductive films to form a gate electrode structure including first and second gate electrodes; implanting ions into said semiconductor substrate using said gate electrode structure as a mask to form source and drain regions; forming a third insulation film on the resulting structure; forming a fourth insulation film on said third insulation film; removing portions of said third and fourth insulation films to expose one of said source or drain regions; forming a wiring layer on the resulting structure; forming a fifth insulation film on said wiring layer; planarizing an upper surface of said fifth insulation film; and forming a sixth, substantially planar, mobile ion gettering insulation film on the planarized fifth insulation film.

Claim 11

A method of manufacturing a nonvolatile semiconductor memory device comprising the steps of: forming a first insulation film on a surface of a semiconductor substrate; forming a first conductive film on said first insulation film; forming a second insulation film on said first conductive film; forming a second conductive film on said second insulation film; patterning said first and second insulation films and said first and second conductive films to form a gate electrode structure including first and second gate electrodes; implanting ions into said semiconductor substrate using said gate electrode structure as a mask to form source and drain regions; forming a third insulation film on the resulting structure; forming a fourth insulation film on said third insulation film; removing portions of said third and fourth insulation films to expose one of said source or drain regions; forming a wiring layer on the resulting structure; forming a fifth insulation film on said wiring layer; planarizing an upper surface of said fifth insulation film; and forming a sixth, substantially planar, mobile ion gettering insulation film on the planarized fifth insulation film.