← Back to Patent Explorer
US5229846A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having noise reducing die pads

Assignee: Toshiba Corp
•
Filing: 1991-08-12
•
Granted: 1993-07-20
•
Expires: 2011-08-12
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract In a semiconductor device including a semiconductor chip, a lead frame with a die pad and plural leads, and a sealing body. The die pad is divided into a plurality of small pieces, and at least one of the plural divided pieces is electrically connected to at least one lead to which a potential is applied. Since the divided die pad is used as a wiring lead, the inductance and resistance of the voltage supply line or the ground line within the chip can be reduced, thus reducing the occurrence of supply voltage and output noise for prevention of erroneous operation.

Inventors

  • 👤 Eiji Kozuka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 17:00
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/411; H10W70/421; H10W72/00; H10W72/50; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5524; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W74/00; H10W90/00; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 104 words
A semiconductor device including a semiconductor chip, a lead frame composed of a die pad for mounting the semiconductor chip thereon and a plurality of leads each having one end located near the die pad and its other end located outside of a package, and a sealed body made by resin molding said semiconductor chip and said lead frame except the other end of each lead, wherein the die pad is divided into a plurality of small pieces, and at least one of the plural divided pieces is electrically connected to at least one of the leads to which a predetermined potential is applied.
Claim 2
Dependent Claim 104 words
A semiconductor device including a semiconductor chip, a lead frame composed of a die pad for mounting the semiconductor chip thereon and a plurality of leads each having one end located near the die pad and its other end located outside of a package, and a sealed body made by resin molding said semiconductor chip and said lead frame except the other end of each lead, wherein the die pad is divided into a plurality of small pieces, and at least one of the plural divided pieces is electrically connected to at least one of the leads to which a predetermined potential is applied.
Claim 3
Dependent Claim 38 words
The semiconductor device of claim 1, wherein the size of each of the plural small pieces is different from each other, and a larger piece is connected to a lead on which noise is likely to be generated.
Claim 4
Dependent Claim 37 words
The semiconductor device of claim 2, wherein the die pad is divided into a relatively large main middle piece and two relatively small subpieces, each subpiece located on one or the other side of the main piece.
Claim 5
Dependent Claim 36 words
The semiconductor device of claim 3, wherein the semiconductor chip is fixed to and supported by both the main piece and the two subpieces, said main piece and said two subpieces being insulated from each other.
Claim 6
Dependent Claim 19 words
The semiconductor device of claim 3, wherein the semiconductor is fixed to and supported by only the main piece.
Claim 7
Dependent Claim 28 words
The semiconductor device of claim 1, wherein the die pad is divided into a relatively large main piece and a relatively small subpiece adjacent to the main piece.
Claim 8
Dependent Claim 34 words
The semiconductor device of claim 6, wherein the semiconductor chip is fixed to and supported by both the main piece and the subpiece, said main piece and said subpiece being insulated from each other.
Claim 9
Dependent Claim 20 words
The semiconductor device of claim 6, wherein the semiconductor chip is fixed to and supported only by the main piece.

References Cited (Backward Citations)

WO1986005322A1 Cited
US4725692A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-07-19 1997-01-18 1997-07-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-07-19 2001-01-18 2001-07-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-07-19 2005-01-18 2005-07-20 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag