US5255366A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Address processing unit for a graphics controller
Assignee: Transpacific IP Ltd
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Filing: 1991-11-25
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Granted: 1993-10-19
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Expires: 2011-11-25
Abstract
Abstract An address processing unit for use in a graphics controller is disclosed. The address processing means performs a variety of address processing functions including conversion between two-dimensional and linear addresses.
Inventors
- 👤 Wei K. Chia
- 👤 Bor C. Kuo
- 👤 Jiunn M. Ju
- 👤 Gen H. Chen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 18:10
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/36; G09G5/363; G06; G06F; G06F12/00; G06F12/02; G06F12/0207; G06T; G06T1/00; G06T1/60; G09G5/14; G09G5/39; G09G2360/00; G09G2360/12; G09G2360/127
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
118 words
An address processing unit for use in a graphics controller for processing addresses to memory means storing pixels comprising a multiplexer for receiving addresses via plurality of address processing paths and for outputting row and column addresses for said memory means, conversion means for converting two-dimensional addresses generated in said graphics controller into linear addresses and for transmitting the linear addresses to said multiplexer, a first processing path wherein linear addresses generated in said graphics controller are transmitted directly to said multiplexer, a second processing path wherein linear or two dimensional addresses generated by a host computer are transmitted directly to said multiplexer, and a third processing path wherein screen refresh addresses are transmitted directly to said multiplexer.
Claim 2
Dependent Claim
118 words
An address processing unit for use in a graphics controller for processing addresses to memory means storing pixels comprising a multiplexer for receiving addresses via plurality of address processing paths and for outputting row and column addresses for said memory means, conversion means for converting two-dimensional addresses generated in said graphics controller into linear addresses and for transmitting the linear addresses to said multiplexer, a first processing path wherein linear addresses generated in said graphics controller are transmitted directly to said multiplexer, a second processing path wherein linear or two dimensional addresses generated by a host computer are transmitted directly to said multiplexer, and a third processing path wherein screen refresh addresses are transmitted directly to said multiplexer.
Claim 3
Dependent Claim
24 words
The address processing unit of claim 1 wherein said memory means comprises a frame buffer and an offscreen memory organized according to linear addressing.
Claim 4
Dependent Claim
16 words
The address processing unit of claim 2 wherein said refresh addresses are for said frame buffer.
Claim 5
Dependent Claim
76 words
The address processing unit of claim 1 wherein said conversion means comprises, multiplying means for multiplying a vertical coordinate of a two-dimensional address by a window width, adding means for adding a horizontal coordinate of a two-dimensional address to an output of said multiplying means, and means for temporarily storing an output of said adding means, and for returning said output of said adding means back to said adding means to add a base address thereto.
Claim 6
Dependent Claim
119 words
An address processing unit for use in a graphics controller for processing addresses to memory means storing pixels comprising a multiplexer for receiving addresses via plurality of address processing paths and for outputting row and column addresses for said memory means, conversion means for converting between addresses of a logical drawing space of said graphics controller and a physical drawing space of said memory means. a first processing path wherein linear addresses generated in said graphics controller are transmitted directly to said multiplexer, a second processing path wherein linear or two dimensional addresses generated by a host computer are transmitted directly to said multiplexer, and a third processing path wherein screen refresh addresses are transmitted directly to said multiplexer.
Claim 7
Dependent Claim
119 words
An address processing unit for use in a graphics controller for processing addresses to memory means storing pixels comprising a multiplexer for receiving addresses via plurality of address processing paths and for outputting row and column addresses for said memory means, conversion means for converting between addresses of a logical drawing space of said graphics controller and a physical drawing space of said memory means. a first processing path wherein linear addresses generated in said graphics controller are transmitted directly to said multiplexer, a second processing path wherein linear or two dimensional addresses generated by a host computer are transmitted directly to said multiplexer, and a third processing path wherein screen refresh addresses are transmitted directly to said multiplexer.
References Cited (Backward Citations)
US5142621A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-10-18 | 1997-04-19 | 1997-10-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-10-18 | 2001-04-19 | 2001-10-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-10-18 | 2005-04-19 | 2005-10-19 | $7700.00 | Window Closed / Lapsed |