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US5266832A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor apparatus and method for producing the same

Assignee: Toyota Industries Corp
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Filing: 1992-02-06
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Granted: 1993-11-30
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Expires: 2012-02-06
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Abstract

Abstract In a semiconductor apparatus and method for producing the same where an upper surface of a semiconductor chip having a thick film electrode is coated with a passivation film, the semiconductor chip being molded with a resin mold such as a power SIT, a conductive film made of a doped polysilicon, a metal material, or the like and which has a thickness of for example 3000 angstroms or more is circumferentially disposed from a bottom circumference of the thick film electrode to a part of region between a field oxide film and a passivation film so as to effectively prevent cracks in the passivation film caused by a cyclic temperature test from extending into the field oxide film.

Inventors

  • 👤 Noriyuki Yamamoto
  • 👤 Yuri Otobe
  • 👤 Takanori Okabe
  • 👤 Minoru Kato

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 17:51
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10D; H10D30/00; H10D30/202; H10D64/00; H10D64/01; H10D64/011

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 99 words
A semiconductor apparatus having a semiconductor chip, which is molded with a resin mold said semiconductor chip comprising: a field oxide film, a semiconductor region exposed to an opening portion of said field oxide film, a thick film electrode disposed on the upper surface of said semiconductor region, and a passivation film disposed on a surface including said field oxide film and said thick film electrode, wherein a conductive film of a predetermined thickness is circumferentially disposed from a bottom circumference portion of said thick film electrode to a region between said field oxide film and said passivation film.
Claim 2
Dependent Claim 99 words
A semiconductor apparatus having a semiconductor chip, which is molded with a resin mold said semiconductor chip comprising: a field oxide film, a semiconductor region exposed to an opening portion of said field oxide film, a thick film electrode disposed on the upper surface of said semiconductor region, and a passivation film disposed on a surface including said field oxide film and said thick film electrode, wherein a conductive film of a predetermined thickness is circumferentially disposed from a bottom circumference portion of said thick film electrode to a region between said field oxide film and said passivation film.
Claim 3
Dependent Claim 18 words
The semiconductor apparatus as set forth in claim 1, wherein said conductive film is made of doped polysilicon.
Claim 4
Dependent Claim 19 words
The semiconductor apparatus as set forth in claim 1, wherein said conductive film is made of a metal material.
Claim 5
Dependent Claim 23 words
The semiconductor apparatus as set forth in claim 1, wherein the thickness of said conductive film is 3000 angstroms or exceeds 3000 angstroms.
Claim 6
Dependent Claim 57 words
The semiconductor apparatus as set forth in claim 1, wherein said thick film electrode is a gate electrode and said semiconductor chip further comprises an EQR electrode, and wherein said gate electrode and said EQR electrode have respective extensions from a bottom circumference, each of which is in the range of from ten micrometers to thirty micrometers.

References Cited (Backward Citations)

US4364078A Cited
US4265685A Cited
US4625227A Cited
US4841354A Cited
US4691224A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-11-29 1997-05-31 1997-11-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-11-29 2001-05-31 2001-11-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-11-29 2005-05-31 2005-11-30 $7700.00 Window Closed / Lapsed

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