US5296738A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Moisture relief for chip carrier
Assignee: NXP USA Inc
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Filing: 1992-08-10
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Granted: 1994-03-22
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Expires: 2012-08-10
Abstract
Abstract An integrated circuit package (10) comprises a semiconductor die (14) having a top surface and a bottom surface, and a substrate (16) for receiving the semiconductor die. The substrate should have an aperture(s) (18) below the semiconductor die for providing moisture relief during temperature excursions. An adhesive (20) applied to the substrate allows for mounting the semiconductor die to the substrate. Then, the semiconductor die is wirebonded to the substrate. Finally, an encapsulant (12) for sealing the top surface of the semiconductor die is formed over the semiconductor die and portions of the substrate.
Inventors
- 👤 Bruce J. Freyman
- 👤 Frank J. Juskey
- 👤 Barry M. Miles
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 13:13
CPC Classifications
H; H10; H10W; H10W42/00; H10W70/00; H10W70/60; H10W70/67; H10W70/68; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W70/681; H10W72/00; H10W72/071; H10W72/073; H10W72/07331; H10W72/07337; H10W72/30; H10W72/351; H10W72/353; H10W72/354; H10W72/50; H10W72/541; H10W72/5449; H10W72/851; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/753; H10W90/754
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
128 words
An overmolded pad array chip carrier package, comprising: a semiconductor die; a printed circuit board substrate for receiving said semiconductor die, said printed circuit board substrate having first and second opposed major surfaces and said substrate having at least one hole below said die; an adhesive applied to said printed circuit board substrate for mounting said semiconductor die to said printed circuit board substrate, at least a portion of said adhesive filling at least a portion of said hole; at least one wirebond from said printed circuit board substrate to said semiconductor die; an overmolded epoxy cover encapsulating said semiconductor die, said at least one wirebond, and portions of said printed circuit board substrate first surface so as to expose said portion of said adhesive to an environment.
Claim 2
Dependent Claim
128 words
An overmolded pad array chip carrier package, comprising: a semiconductor die; a printed circuit board substrate for receiving said semiconductor die, said printed circuit board substrate having first and second opposed major surfaces and said substrate having at least one hole below said die; an adhesive applied to said printed circuit board substrate for mounting said semiconductor die to said printed circuit board substrate, at least a portion of said adhesive filling at least a portion of said hole; at least one wirebond from said printed circuit board substrate to said semiconductor die; an overmolded epoxy cover encapsulating said semiconductor die, said at least one wirebond, and portions of said printed circuit board substrate first surface so as to expose said portion of said adhesive to an environment.
Claim 3
Dependent Claim
20 words
The chip carrier package of claim 1, wherein said at least one hole is less than 30 mils in diameter.
Claim 4
Dependent Claim
110 words
An integrated circuit package, comprising: a semiconductor die having a top surface and a bottom surface; a printed circuit substrate for receiving said semiconductor die, said printed circuit substrate having a die mounting area with a hole extending through the printed circuit substrate; an adhesive applied to the printed circuit substrate for mounting said semiconductor die to said printed circuit substrate, a portion of said adhesive at least partially filling said hole; at least one wirebond from said printed circuit substrate to said semiconductor die, a glob top encapsulant for sealing the top surface of said semiconductor die, said wirebonds and only an upper surface of said printed circuit substrate.
Claim 5
Dependent Claim
110 words
An integrated circuit package, comprising: a semiconductor die having a top surface and a bottom surface; a printed circuit substrate for receiving said semiconductor die, said printed circuit substrate having a die mounting area with a hole extending through the printed circuit substrate; an adhesive applied to the printed circuit substrate for mounting said semiconductor die to said printed circuit substrate, a portion of said adhesive at least partially filling said hole; at least one wirebond from said printed circuit substrate to said semiconductor die, a glob top encapsulant for sealing the top surface of said semiconductor die, said wirebonds and only an upper surface of said printed circuit substrate.
Claim 6
Dependent Claim
19 words
The integrated circuit package of claim 3, wherein said integrated circuit package comprises a glob top pad array carrier.
Claim 7
Dependent Claim
19 words
The integrated circuit package of claim 3, wherein said integrated circuit package comprises a glob top pin grid array.
Claim 8
Dependent Claim
19 words
The integrated circuit package of claim 3, wherein said integrated circuit package comprises a glob top peripheral chip carrier.
Claim 9
Dependent Claim
15 words
The integrated circuit package of claim 3, wherein said adhesive comprises a bisphenol-epichlorhydrin based epoxy.
Claim 10
Dependent Claim
17 words
The integrated circuit package of claim 3, wherein said hole(s) is less than 30 mils in diameter.
Claim 11
Dependent Claim
125 words
A chip carrier package, comprising: a semiconductor die having a perimeter; a printed circuit board for receiving said semiconductor die, said printed circuit board having first and second opposed major surfaces and having at least one hole within an area bounded by said semiconductor die perimeter; an adhesive applied to said first major surface for mounting said semiconductor die to said printed circuit board, said adhesive filling at least a portion of said hole; at least one wirebond from said printed circuit board to said semiconductor die; an over molded cover encapsulating said semiconductor die, said at least one wirebond, portions of said printed circuit board first surface, and arranged so as to leave a portion of said hole in said second major surface exposed.
Claim 12
Dependent Claim
125 words
A chip carrier package, comprising: a semiconductor die having a perimeter; a printed circuit board for receiving said semiconductor die, said printed circuit board having first and second opposed major surfaces and having at least one hole within an area bounded by said semiconductor die perimeter; an adhesive applied to said first major surface for mounting said semiconductor die to said printed circuit board, said adhesive filling at least a portion of said hole; at least one wirebond from said printed circuit board to said semiconductor die; an over molded cover encapsulating said semiconductor die, said at least one wirebond, portions of said printed circuit board first surface, and arranged so as to leave a portion of said hole in said second major surface exposed.
Claim 13
Dependent Claim
19 words
The chip carrier package of claim 1, wherein said chip carrier package comprises an over molded pad array carrier.
Claim 14
Dependent Claim
19 words
The chip carrier package of claim 1, wherein said chip carrier package comprises an over molded pin grid array.
Claim 15
Dependent Claim
19 words
The chip carrier package of claim 1, wherein said chip carrier package comprises an over molded peripheral chip carrier.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-03-21 | 1997-09-20 | 1998-03-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-03-21 | 2001-09-20 | 2002-03-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-03-21 | 2005-09-20 | 2006-03-22 | $7700.00 | Window Closed / Lapsed |