US5301279A
Expired / Lapsed
US
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Apparatus for conditioning priority arbitration
Assignee: International Business Machines Corp
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Filing: 1992-11-24
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Granted: 1994-04-05
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Expires: 2012-11-24
Abstract
Abstract A data processing system including an arrangement for modifying the usual priority arbitration of an input/output channel controller (IOCC) used in granting direct memory access (DMA) service among contending peripheral devices sharing a common peripheral bus. The IOCC includes logic for conditioning the established priority arbitration scheme based upon the data status of the data buffers. If the higher priority requesting device requires a data transfer between the system memory and the IOCC prior to performing an operation directly between the IOCC and the peripheral device, the priority will instead be granted to a lower priority peripheral device that does not require a system memory access operation.
Inventors
- 👤 Mack W. Riley
- 👤 John D. Upton
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 19:29
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/28; G06F13/30; G06F13/36; G06F13/362
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
183 words
An input/output channel control apparatus for regulating data transfer operations, said apparatus comprising: a data storage device; at least two peripheral devices, each peripheral device having a predetermined priority ranking; at least two data buffer means, each for storing data being transferred between said data storage device and at least one of said at least two peripheral devices; means for indicating a data status of each of said data buffer means, the data status indicating whether the data buffer means are ready to handle a data transfer request; priority arbitration means for regulating said data transfer operations by granting a data transfer request to one among contending ones of said peripheral devices requesting data transfer, based upon the predetermined priority ranking of each of said peripheral devices; and priority conditioning means coupled to said priority arbitration means for altering said predetermined priority ranking by disabling the data transfer request of a said peripheral device when the data status indicates that the data buffer means is not ready to handle the data transfer request thereby preventing said peripheral device from contending for data transfer.
Claim 2
Dependent Claim
183 words
An input/output channel control apparatus for regulating data transfer operations, said apparatus comprising: a data storage device; at least two peripheral devices, each peripheral device having a predetermined priority ranking; at least two data buffer means, each for storing data being transferred between said data storage device and at least one of said at least two peripheral devices; means for indicating a data status of each of said data buffer means, the data status indicating whether the data buffer means are ready to handle a data transfer request; priority arbitration means for regulating said data transfer operations by granting a data transfer request to one among contending ones of said peripheral devices requesting data transfer, based upon the predetermined priority ranking of each of said peripheral devices; and priority conditioning means coupled to said priority arbitration means for altering said predetermined priority ranking by disabling the data transfer request of a said peripheral device when the data status indicates that the data buffer means is not ready to handle the data transfer request thereby preventing said peripheral device from contending for data transfer.
Claim 3
Dependent Claim
32 words
The input/output channel control apparatus according to claim 1 wherein said data status indicating that said data buffer means is full of data, when said data transfer operation is a write operation.
Claim 4
Dependent Claim
32 words
The input/output channel control apparatus according to claim 1 wherein said data status indicates that said data buffer means is empty of data, when said data transfer operation is a read operation.
Claim 5
Dependent Claim
221 words
A data processing system, comprising: a central processing unit; a system memory; a data transferring bus connecting said system memory to said central processing unit; at least two peripheral devices, each peripheral device having a predetermined priority ranking; an input/output channel control means connected to said data transferring bus for regulating the transfer of data between each of the at least two peripheral devices connected thereto and said central processing unit and said system memory, said input/output channel control means including a plurality of data buffer means, each for storing data being transferred to or from at least one of said at least two peripheral devices; means for indicating a data status of each of said data buffer means, the data status indicating whether the data buffer means are ready to handle a data transfer request; priority arbitration means for regulating said data transfers by granting requests for data transfers to one among contending ones of said peripheral devices requesting data transfer, according to predetermined priority ranking of each of said peripheral devices; and priority conditioning means for modifying said priority ranking by disabling the data transfer request of said peripheral device when the data status indicates that the data buffer means is not ready to handle the data transfer request thereby preventing said peripheral device from contending for data transfer.
Claim 6
Dependent Claim
221 words
A data processing system, comprising: a central processing unit; a system memory; a data transferring bus connecting said system memory to said central processing unit; at least two peripheral devices, each peripheral device having a predetermined priority ranking; an input/output channel control means connected to said data transferring bus for regulating the transfer of data between each of the at least two peripheral devices connected thereto and said central processing unit and said system memory, said input/output channel control means including a plurality of data buffer means, each for storing data being transferred to or from at least one of said at least two peripheral devices; means for indicating a data status of each of said data buffer means, the data status indicating whether the data buffer means are ready to handle a data transfer request; priority arbitration means for regulating said data transfers by granting requests for data transfers to one among contending ones of said peripheral devices requesting data transfer, according to predetermined priority ranking of each of said peripheral devices; and priority conditioning means for modifying said priority ranking by disabling the data transfer request of said peripheral device when the data status indicates that the data buffer means is not ready to handle the data transfer request thereby preventing said peripheral device from contending for data transfer.
Claim 7
Dependent Claim
32 words
The data processing system according to claim 4 wherein said data status indicates that said data buffer means is full of data, when said data transfer operation is a data write operation.
Claim 8
Dependent Claim
32 words
The data processing system according to claim 4 wherein said data status indicates that said data buffer means is empty of data, when said data transfer operation is a data read operation.
Claim 9
Dependent Claim
41 words
The data processing system according to claim 4 further comprising: a peripheral bus connecting said peripheral devices to said data buffer means, and an internal bus connecting each said data buffer means to said system memory and said central processing unit.
Claim 10
Independent Claim
161 words
A method for regulating the transfer of data between at least two peripheral devices, each peripheral device having a predetermined priority ranking and a data processing memory, comprising the steps of: storing data for said transfer in at least two data buffers, each for storing data being transferred between said data storage device and at least one of said at least two said peripheral devices; indicating a data status of each said data buffers, the data status indicating whether the data buffer means are ready to handle a data transfer request; granting data transfer requests to one among contending ones of said peripheral devices requesting data transfer, according to the predetermined priority ranking of said peripheral devices; and altering said predetermined priority ranking by disabling the data transfer request of said peripheral device when the data status indicates that said data buffer is not ready to handle the data transfer request thereby preventing said peripheral device from contending for data transfer.
Claim 11
Independent Claim
161 words
A method for regulating the transfer of data between at least two peripheral devices, each peripheral device having a predetermined priority ranking and a data processing memory, comprising the steps of: storing data for said transfer in at least two data buffers, each for storing data being transferred between said data storage device and at least one of said at least two said peripheral devices; indicating a data status of each said data buffers, the data status indicating whether the data buffer means are ready to handle a data transfer request; granting data transfer requests to one among contending ones of said peripheral devices requesting data transfer, according to the predetermined priority ranking of said peripheral devices; and altering said predetermined priority ranking by disabling the data transfer request of said peripheral device when the data status indicates that said data buffer is not ready to handle the data transfer request thereby preventing said peripheral device from contending for data transfer.
Claim 12
Dependent Claim
25 words
The method according to claim 8 wherein indicating that said data buffer is full of data, when said data transfer is a data write operation.
Claim 13
Dependent Claim
25 words
The method according to claim 8 wherein indicating that said data buffer is empty of data, when said data transfer is a data read operation.
Claim 14
Independent Claim
163 words
A method for regulating the transfer of data between at least two peripheral devices, each peripheral device having a predetermined priority ranking, and a data processing memory, comprising the steps of: assigning a data buffer to each one of said at least two peripheral devices; receiving data transfer requests from said peripheral devices; storing data for said data transfer request in said data buffers assigned to said peripheral devices; indicating the data status of said data buffers, the data status indicating whether the data buffers are ready to handle the data transfer requests; granting data transfer requests to one among contending ones of said peripheral devices requesting data transfer according to an established priority ranking of said peripheral devices; and altering said priority ranking by disabling the data transfer request of a peripheral device when the data status indicates that the assigned data buffer is not ready to handle the data transfer request thereby preventing said peripheral device from contending for data transfer.
Claim 15
Independent Claim
163 words
A method for regulating the transfer of data between at least two peripheral devices, each peripheral device having a predetermined priority ranking, and a data processing memory, comprising the steps of: assigning a data buffer to each one of said at least two peripheral devices; receiving data transfer requests from said peripheral devices; storing data for said data transfer request in said data buffers assigned to said peripheral devices; indicating the data status of said data buffers, the data status indicating whether the data buffers are ready to handle the data transfer requests; granting data transfer requests to one among contending ones of said peripheral devices requesting data transfer according to an established priority ranking of said peripheral devices; and altering said priority ranking by disabling the data transfer request of a peripheral device when the data status indicates that the assigned data buffer is not ready to handle the data transfer request thereby preventing said peripheral device from contending for data transfer.
Claim 16
Dependent Claim
25 words
The method according to claim 11 wherein indicating that said data buffer is full of data, when said data transfer is a data write operation.
Claim 17
Dependent Claim
25 words
The method according to claim 11 wherein indicating that said data buffer is empty of data, when said data transfer is a data read operation.
Claim 18
Dependent Claim
207 words
An input/output channel control apparatus for regulating read and write data transfer operations, said apparatus comprising: a data storage device; at least two peripheral devices, each peripheral device having a predetermined priority ranking; at least two data buffer means, each for storing data being transferred between said data storage device and at least one of said at least two peripheral devices; means for indicating when each said data buffer means is either full or empty of data; priority arbitration means for granting data transfer request to one among contending ones of said peripheral devices requesting data transfer based upon the predetermined priority ranging of each of said peripheral devices; and priority conditioning means coupled to said priority arbitration means for disabling the data transfer request of a said peripheral device when said corresponding data buffer means is full of data and said data transfer request is for a write data transfer from said peripheral device, and when said corresponding data buffer means is empty of data and said data transfer request is a read data transfer to said peripheral device, thereby avoiding delay in data transfer operations caused by the data status of said buffer means and thereby preventing said peripheral device from contending for data transfer.
Claim 19
Dependent Claim
207 words
An input/output channel control apparatus for regulating read and write data transfer operations, said apparatus comprising: a data storage device; at least two peripheral devices, each peripheral device having a predetermined priority ranking; at least two data buffer means, each for storing data being transferred between said data storage device and at least one of said at least two peripheral devices; means for indicating when each said data buffer means is either full or empty of data; priority arbitration means for granting data transfer request to one among contending ones of said peripheral devices requesting data transfer based upon the predetermined priority ranging of each of said peripheral devices; and priority conditioning means coupled to said priority arbitration means for disabling the data transfer request of a said peripheral device when said corresponding data buffer means is full of data and said data transfer request is for a write data transfer from said peripheral device, and when said corresponding data buffer means is empty of data and said data transfer request is a read data transfer to said peripheral device, thereby avoiding delay in data transfer operations caused by the data status of said buffer means and thereby preventing said peripheral device from contending for data transfer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-04-04 | 1997-10-04 | 1998-04-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-04-04 | 2001-10-04 | 2002-04-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-04-04 | 2005-10-04 | 2006-04-05 | $7700.00 | Window Closed / Lapsed |