Power management for programmable logic devices

Claim 2

A programmable circuit comprising: a plurality of circuit blocks for performing logic functions on input signals, each block receiving the input data signals on at least one private input line connected to that block and to no other block, and on at least one shared input line also connected to at least one other block; at lest one current regulating circuit for regulating said at least one shared input line, each current regulating circuit having two states, a first state causing said at least one shared input line to output a first current for providing a first operation speed of a logic function of a data signal thereon and a second state causing said at least one shared input line to output a second current greater than the first for providing a second higher operation speed of said logic function of the same data signal thereon; and a control circuit for setting the state of the current regulating circuit.

Claim 3

The programmable circuit of claim 1, wherein the control circuits includes a single memory element for storing a configuration bit for setting the state of the current regulating circuit.

Claim 4

the programmable circuit of claim 1, wherein each current regulating circuit is a sense amplifier.

Claim 5

A programmable circuit according to claim 3 wherein said sense amplifier comprises: a first signal line; a second signal line; a circuit coupled between said first signal line and said second signal line, said circuit switchable between a low resistance state and a high resistance state.

Claim 6

A programmable circuit acccording to claim 3 wherein each said sense amplifier comprises: a first current drawing element coupled between a shared input line and a line which is branched to circuit blocks sharing said shared input line, said first current drawing element switchable between an open circuit resistance state and a predetermined high resistance state; and a second current drawing element coupled between a shared input line and a line which is branched to circuit blocks sharing said shared input line, said second current drawing element switchable between an open circuit state and a predetermined low resistance state.

Claim 7

A programmable circuit according to claim 3 wherein each said sense amplifier comprises: a first transistor having a first terminal and a second terminal, said first transistor having a gate; a second transistor having a first terminal and a second terminal, said second transistor having a gate; a first bit line connected to said first terminals of said first and second transistors; a second bit line connected to said second terminals of said first and second transistors; a third transistor having a first terminal connected to said second transistor gate, and a second terminal connected to said first transistor gate, said third transistor having a gate; an inverter having an input terminal and an output terminal, said input terminal connected to said third transistor gate; a fourth transistor having a first terminal connected to ground and a second terminal connected to said second transistor gate, said fourth transistor having a gate connected to said inverter output terminal; a first voltage terminal connected to said second terminals of said first and second transistors providing power to said first and second transistors; a second voltage terminal connected to said first transistor gate to provide a bias voltage for said first transistor; and a control terminal connected to said third transistor gate.

Claim 8

A programmable circuit comprising: a plurality of electrical circuits, each electrical circuit having a plurality of private resource input lines, each said private input line having a private line current regulating circuit, each said electrical circuit having a plurality of shared resource input terminals, each private line current regulating circuit having a control terminal; a plurality of private configuration circuits each associated with one of said electrical circuits, each said private configuration circuit connected to the control terminal of each of said private line current regulating circuits of said associated electrical circuit, each said private configuration circuit having two programmable states, the first causing said private line current regulating circuit of said associated electrical circuit to operate at a first current level, the second causing said private line current regulating circuits of said associated electrical circuit to operate at a second current level higher than the first; a plurality of shared lines, each of said plurality of shared lines having a shared line current regulating circuit, each shared line current regulating circuit having a control terminal; a shared configuration circuit connected to each of said shared line current regulating circuit control terminals, said shared configuration circuit having two programmable states, the first causing said shared line current regulating circuit of said associated electrical circuit to operate at the first current level, the second causing said shared line current regulating circuit of said associated electrical circuit to operate at the second higher current level; and a plurality of programmable switches, each having an input terminal and an output terminal, said output terminals of each said switch connected to an associated shared resource input terminal, said input terminal of each switch connected to an associated shared line, each of said switches having two programmable states, the first causing an open circuit between said associated resource line and said associated shared resource input terminal, the second causing a closed circuit between said associated shared resource line and said associated shared input terminal.

Claim 9

A programmable circuit comprising: a plurality of electrical circuits, each electrical circuit having a plurality of private resource input lines, each said private input line having a private line current regulating circuit, each said electrical circuit having a plurality of shared resource input terminals, each private line current regulating circuit having a control terminal; a plurality of private configuration circuits each associated with one of said electrical circuits, each said private configuration circuit connected to the control terminal of each of said private line current regulating circuits of said associated electrical circuit, each said private configuration circuit having two programmable states, the first causing said private line current regulating circuit of said associated electrical circuit to operate at a first current level, the second causing said private line current regulating circuits of said associated electrical circuit to operate at a second current level higher than the first; a plurality of shared lines, each of said plurality of shared lines having a shared line current regulating circuit, each shared line current regulating circuit having a control terminal; a shared configuration circuit connected to each of said shared line current regulating circuit control terminals, said shared configuration circuit having two programmable states, the first causing said shared line current regulating circuit of said associated electrical circuit to operate at the first current level, the second causing said shared line current regulating circuit of said associated electrical circuit to operate at the second higher current level; and a plurality of programmable switches, each having an input terminal and an output terminal, said output terminals of each said switch connected to an associated shared resource input terminal, said input terminal of each switch connected to an associated shared line, each of said switches having two programmable states, the first causing an open circuit between said associated resource line and said associated shared resource input terminal, the second causing a closed circuit between said associated shared resource line and said associated shared input terminal.

Claim 10

A programmable circuit according to claim 7 wherein said electrical circuits are configurable macrocells.

Claim 11

A programmable circuit according to claim 8 wherein said private line current regulating circuits and said shared line current regulating circuits are each sense amplifiers.

Claim 12

A programmable circuit comprising: a plurality of electrical circuit elements, each electrical circuit element having a plurality of private resource input lines, each said private input line having a private line current regulating circuit, each said electrical circuit element having a plurality of shared resource input terminals, each private line current regulating circuit having a control terminal; a plurality of private configuration circuits each connected to the control terminal of an associated private line current regulating circuit, each said private configuration circuit having two programmable states, the first causing said associated private line current regulating circuit to operate at a first current level, the second causing said associated private line current regulating circuit to operate at a second current level higher than the first; a plurality of shared lines, each of said plurality of shared lines having a shared line current regulating circuit, each shared line current regulating circuit having a control terminal; a plurality of shared configuration circuits, each connected to the control terminal of an associated shared line current regulating circuit, each of said shared configuration circuits having two programmable states, the first causing said associated shared line current regulating circuit to operate at a first current level, the second causing said associated shared line current regulating circuit to operate at a second current level higher than the first; and a plurality of programmable switches, each having an input terminal and an output terminal, said output terminals of each said switch connected to an associated shared resource input terminal, said input terminal of each switch connected to an associated shared line, each of said switches having two programmable states, the first causing an open circuit between said associated resource line and said associated shared resource input terminal, the second causing a closed circuit between said associated shared resource line and said associated shared input terminal.

Claim 13

A programmable circuit comprising: a plurality of electrical circuit elements, each electrical circuit element having a plurality of private resource input lines, each said private input line having a private line current regulating circuit, each said electrical circuit element having a plurality of shared resource input terminals, each private line current regulating circuit having a control terminal; a plurality of private configuration circuits each connected to the control terminal of an associated private line current regulating circuit, each said private configuration circuit having two programmable states, the first causing said associated private line current regulating circuit to operate at a first current level, the second causing said associated private line current regulating circuit to operate at a second current level higher than the first; a plurality of shared lines, each of said plurality of shared lines having a shared line current regulating circuit, each shared line current regulating circuit having a control terminal; a plurality of shared configuration circuits, each connected to the control terminal of an associated shared line current regulating circuit, each of said shared configuration circuits having two programmable states, the first causing said associated shared line current regulating circuit to operate at a first current level, the second causing said associated shared line current regulating circuit to operate at a second current level higher than the first; and a plurality of programmable switches, each having an input terminal and an output terminal, said output terminals of each said switch connected to an associated shared resource input terminal, said input terminal of each switch connected to an associated shared line, each of said switches having two programmable states, the first causing an open circuit between said associated resource line and said associated shared resource input terminal, the second causing a closed circuit between said associated shared resource line and said associated shared input terminal.

Claim 14

A programmable circuit according to claim 10 wherein said electrical circuits are configurable macrocells.

Claim 15

A programmable circuit according to claim 11 wherein said private line current regulating circuits and said shared line current regulating circuits are each sense amplifiers.

Claim 20

An integrated circuit comprising: a plurality of blocks, each block receiving signals on a plurality of private input lines connected to that block and to no other block, and a plurality of shared input lines also connected to at least one other block; an individual current regulating circuit for each private input line and each shared input line; a first control circuit setting a state of the current regulating circuit for at least one of the private input lines for a particular block; and a second control circuit setting a state of the current regulating circuit for at least one of the shared input lines for the particular block; wherein each of the first and second control circuits operates in one of two states, a first state being a high current output by the associated current regulating circuit, and a second state being a lower current output by the associated current regulating circuit.

Claim 21

An integrated circuit comprising: a plurality of blocks, each block receiving signals on a plurality of private input lines connected to that block and to no other block, and a plurality of shared input lines also connected to at least one other block; an individual current regulating circuit for each private input line and each shared input line; a first control circuit setting a state of the current regulating circuit for at least one of the private input lines for a particular block; and a second control circuit setting a state of the current regulating circuit for at least one of the shared input lines for the particular block; wherein each of the first and second control circuits operates in one of two states, a first state being a high current output by the associated current regulating circuit, and a second state being a lower current output by the associated current regulating circuit.