US5333055A
Expired / Lapsed
US
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Video camera circuit for processing image signals from an image pickup device having a mosaic color filter
Assignee: Sanyo Electric Co Ltd
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Filing: 1993-02-23
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Granted: 1994-07-26
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Expires: 2013-02-23
Abstract
Abstract A video camera circuit for processing an image signal from an image pickup device having a mosaic color filter comprises a field memroy control circuit for reading out a predetermined line of signal (CCD output data) from a field memory when the position of vertical interpolation has changed, first, second and third line memories for storing the signal from the field memory, a line memory control circuit for controlling signal writing in and reading out from the line memories to concurrently retrieve three lines of signal, a vertical interpolation block for preparing a signal at the position of interpolation based on the four lines of signal, and a Y/C separation block for separating a luminance signal and color difference signals from the signal at the position of interpolation.
Inventors
- 👤 Haruhiko Murata
- 👤 Yukio Mori
- 👤 Akihiro Maenaka
- 👤 Masao Takuma
- 👤 Kiyotada Kawakami
- 👤 Toru Yamamoto
- 👤 Toru Asaeda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 14:43
CPC Classifications
H; H04; H04N; H04N23/00; H04N23/80; H04N23/84; H04N23/843; H04N25/00; H04N25/10; H04N25/11; H04N25/13; H04N25/135; H04N25/136; H04N2209/00; H04N2209/04; H04N2209/041; H04N2209/042; H04N2209/045; H04N2209/046
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
344 words
In a video camera comprising an image pickup device having a mosaic color filter and a field memory for storing an image output from the pickup device on conversion to a CCD output digital signal, the camera being adapted to vertically interpolate said CCD output digital signal as read out from the field memory in corresponding relation with an image area to be processed for zooming and to produce a luminance signal and color difference signals for each of horizontal scan lines for forming a zoomed image, a video camera circuit comprising: a field memory control circuit for reading out from the field memory said CCD output digital signal of the lower-most of four consecutive horizontal scan lines on a screen of a monitor presenting the image, said scan lines consisting of two lines above and two lines below a new position of vertical interpolation when the position of interpolation has changed, first, second and third line memories connected to an output terminal of the field memory for storing first, second and third digital signals of three horizontal scan lines, respectively, from the field memory each from line to line, a line memory control circuit connected between said field memory control circuit and said first, second and third line memories for controlling writing in and reading out of data from the first, second and third line memories to concurrently retrieve said first, second and third digital signals of the three of the four horizontal scan lines, a vertical interpolation circuit connected to the four horizontal scan lines for preparing an interpolated digital signal on a horizontal scan line at the position of interpolation based on said first, second, third and CCD output digital signals, respectively, of the four horizontal scan lines, said vertical interpolation circuit including a plurality of filters used in preparing said interpolated digital signal, and a Y/C separation circuit connected to an output of two of said filters for separating a luminance signal and color difference signals from said interpolated digital signal at the interpolation position to output the separated signals.
Claim 2
Dependent Claim
344 words
In a video camera comprising an image pickup device having a mosaic color filter and a field memory for storing an image output from the pickup device on conversion to a CCD output digital signal, the camera being adapted to vertically interpolate said CCD output digital signal as read out from the field memory in corresponding relation with an image area to be processed for zooming and to produce a luminance signal and color difference signals for each of horizontal scan lines for forming a zoomed image, a video camera circuit comprising: a field memory control circuit for reading out from the field memory said CCD output digital signal of the lower-most of four consecutive horizontal scan lines on a screen of a monitor presenting the image, said scan lines consisting of two lines above and two lines below a new position of vertical interpolation when the position of interpolation has changed, first, second and third line memories connected to an output terminal of the field memory for storing first, second and third digital signals of three horizontal scan lines, respectively, from the field memory each from line to line, a line memory control circuit connected between said field memory control circuit and said first, second and third line memories for controlling writing in and reading out of data from the first, second and third line memories to concurrently retrieve said first, second and third digital signals of the three of the four horizontal scan lines, a vertical interpolation circuit connected to the four horizontal scan lines for preparing an interpolated digital signal on a horizontal scan line at the position of interpolation based on said first, second, third and CCD output digital signals, respectively, of the four horizontal scan lines, said vertical interpolation circuit including a plurality of filters used in preparing said interpolated digital signal, and a Y/C separation circuit connected to an output of two of said filters for separating a luminance signal and color difference signals from said interpolated digital signal at the interpolation position to output the separated signals.
Claim 3
Dependent Claim
53 words
A video camera circuit as defined in claim 1 wherein between the line memory control circuit and said third line memory, a circuit is interposed for forcibly nullifying writing and reading control signals for said third line memory in accordance with a signal representing that no vertical zoom processing is to be executed.
Claim 4
Dependent Claim
122 words
A video camera circuit for producing a video signal at a predetermined vertical position in an image area by vertical interpolation based on a CCD output signal obtained by converting an output from a solid image pickup device (CCD) to a digital signal, the video camera circuit comprising: first, second and third line memory means connected in series with an output terminal for the CCD output signal, and vertical interpolation filter means for receiving the CCD output signal and output signals from the respective first, second and third line memory means as output signals of four lines and effecting vertical interpolation at a vertical position between the middle two of the four lines based on the output signals of the four lines.
Claim 5
Dependent Claim
122 words
A video camera circuit for producing a video signal at a predetermined vertical position in an image area by vertical interpolation based on a CCD output signal obtained by converting an output from a solid image pickup device (CCD) to a digital signal, the video camera circuit comprising: first, second and third line memory means connected in series with an output terminal for the CCD output signal, and vertical interpolation filter means for receiving the CCD output signal and output signals from the respective first, second and third line memory means as output signals of four lines and effecting vertical interpolation at a vertical position between the middle two of the four lines based on the output signals of the four lines.
Claim 6
Dependent Claim
50 words
A video camera circuit as defined in claim 3 wherein the vertical interpolation filter means includes coefficient setting circuits for selectively setting four tap coefficients to be multiplied respectively by the output signals of the four lines to obtain substantially constant frequency characteristics irrespective of the position of vertical interpolation.
Claim 7
Dependent Claim
118 words
A video camera circuit for processing an image signal from an image pickup device having a mosaic color filter, comprising: means operable based on the image signal on a plurality of horizontal scan lines consecutive with respect to a vertical direction for detecting a linear differential signal of a luminance signal contained in the image signal with respect to the vertical direction, means for preparing a control signal for suppressing a false color signal produced with respect to the vertical direction and attributable to the color filter, upon the absolute value of the linear differential signal exceeding a predetermined value, and means for suppressing a color signal contained in the image signal in accordance with the control signal.
Claim 8
Dependent Claim
118 words
A video camera circuit for processing an image signal from an image pickup device having a mosaic color filter, comprising: means operable based on the image signal on a plurality of horizontal scan lines consecutive with respect to a vertical direction for detecting a linear differential signal of a luminance signal contained in the image signal with respect to the vertical direction, means for preparing a control signal for suppressing a false color signal produced with respect to the vertical direction and attributable to the color filter, upon the absolute value of the linear differential signal exceeding a predetermined value, and means for suppressing a color signal contained in the image signal in accordance with the control signal.
Claim 9
Dependent Claim
95 words
A video camera circuit as defined in claim 5 wherein the image pickup device has connected to an output terminal thereof a vertical interpolation circuit for enlarging a predetermined field angle within an image screen area by interpolation, the vertical interpolation circuit having a vertical interpolation filter for effecting vertical interpolation and detecting the linear differential signal at the same time based on the image signal of four horizontal scan lines which are two lines above and two lines below a position of interpolation, the vertical interpolation filter constituting the linear differential signal detecting means.
Claim 10
Dependent Claim
88 words
A video camera circuit as defined in claim 5 wherein the linear differential signal detecting means has a plurality of line memory means connected in series with an output terminal of the image pickup device, and calculating means for preparing a differential signal between output signals of two lines included in output signals delivered from the line memory means in vertically consecutive three lines, the two lines being other than the middle line of the three lines, and the differential signal is detected as the linear differential signal.
Claim 11
Dependent Claim
51 words
A video camera circuit as defined in claim 5 further including means for adjusting gain of the control signal so as to discontinue suppression of the false color signal or reduce the degree of suppression when the luminance signal contained in the image signal is in excess of a predetermined level.
Claim 12
Dependent Claim
128 words
A video camera circuit for processing an image signal from an image pickup device having a mosaic color filter, the circuit comprising: means for preparing from the image signal on a plurality of horizontal scan lines arranged in a vertical direction a linear differential signal and a quadratic differential signal of a luminance signal with respect to the vertical direction, means for preparing a control signal for suppressing a false color signal produced with respect to the vertical direction and attributable to the color filter, upon the sum of the absolute value of the linear differential signal and the absolute value of the quadratic differential signal exceeding a predetermined value, and means for suppressing a color signal contained in the image signal in accordance with the control signal.
Claim 13
Dependent Claim
128 words
A video camera circuit for processing an image signal from an image pickup device having a mosaic color filter, the circuit comprising: means for preparing from the image signal on a plurality of horizontal scan lines arranged in a vertical direction a linear differential signal and a quadratic differential signal of a luminance signal with respect to the vertical direction, means for preparing a control signal for suppressing a false color signal produced with respect to the vertical direction and attributable to the color filter, upon the sum of the absolute value of the linear differential signal and the absolute value of the quadratic differential signal exceeding a predetermined value, and means for suppressing a color signal contained in the image signal in accordance with the control signal.
Claim 14
Dependent Claim
135 words
A video camera circuit as defined in claim 9 wherein the image pickup device has connected to an output terminal thereof a vertical interpolation circuit for enlarging a predetermined field angle within an image screen area by interpolation, the vertical interpolation circuit having a first vertical interpolation filter for effecting vertical interpolation and detecting the linear differential signal at the same time based on the image signal of four horizontal scan lines which are two lines above and two lines below a position of interpolation, and a second vertical interpolation filter for effecting vertical interpolartion and detecting the quadratic differential signal at the same time based on the image signal on the four horizontal scan lines, the two vertical interpolation filters constituting the linear differential signal preparing means and the quadratic differential signal preparing means.
Claim 15
Dependent Claim
51 words
A video camera circuit as defined in claim 9 further including means for adjusting gain of the control signal so as to discontinue suppression of the false color signal or reduce the degree of suppression when the luminance signal contained in the image signal is in excess of a predetermined level.
References Cited (Backward Citations)
US4754323A
Cited
US4951125A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-07-25 | 1998-01-24 | 1998-07-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-07-25 | 2002-01-24 | 2002-07-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-07-25 | 2006-01-24 | 2006-07-26 | $7700.00 | Window Closed / Lapsed |