← Back to Patent Explorer
US5353313A Expired / Lapsed US ⏱️ 0.0 years remaining

Transmission of a clock signal over an asynchronous data channel

Assignee: Nokia Bell Labs
•
Filing: 1992-04-10
•
Granted: 1994-10-04
•
Expires: 2012-04-10
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An input clock signal associated with an input data signal is divided by a predetermined integer N, to form a sub-rate clock signal. The sub-rate clock signal is sampled and transmitted along with the input data over an asynchronous data channel. At the receiver, the resulting sub-rate clock signal is received and coupled to a phase lock loop which generates a recovered clock signal of the same frequency and substantially in phase with the input clock signal.

Inventors

  • 👤 William K. Honea

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 05:44
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/062; H04J3/0632; H04L; H04L7/00; H04L7/0008; H04N; H04N21/00; H04N21/20; H04N21/23; H04N21/242; H04N21/40; H04N21/43; H04N21/4302; H04N21/4305

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 137 words
Transmitter apparatus for communicating an input digital data word and an input clock signal over a communication channel at a data word transmission rate which operates asynchronously with respect to said input clock signal, said transmitter comprising means for generating said input data word from an input analog signal sampled by said input clock signal, said input clock signal being derived independently of said input analog signal, means for dividing said input clock signal by a predetermined integer to obtain a sub-rate frequency clock signal which is less than or equal to one-half of the data word transmission rate of said transmitter and means for combining a logic state sample of said sub-rate clock signal together with said input data word to form each data word to be transmitted in a packet data format from said transmitter.
Claim 2
Dependent Claim 137 words
Transmitter apparatus for communicating an input digital data word and an input clock signal over a communication channel at a data word transmission rate which operates asynchronously with respect to said input clock signal, said transmitter comprising means for generating said input data word from an input analog signal sampled by said input clock signal, said input clock signal being derived independently of said input analog signal, means for dividing said input clock signal by a predetermined integer to obtain a sub-rate frequency clock signal which is less than or equal to one-half of the data word transmission rate of said transmitter and means for combining a logic state sample of said sub-rate clock signal together with said input data word to form each data word to be transmitted in a packet data format from said transmitter.
Claim 3
Dependent Claim 22 words
The transmitter of claim 1 wherein an average data word transmission rate is greater than an average input data word generation rate.
Claim 4
Dependent Claim 29 words
The transmitter of claim 1 wherein said sub-rate clock signal is one Nth of frequency of said input clock signal, where N is greater than or equal to 2.
Claim 5
Dependent Claim 65 words
The transmitter of claim 1 wherein said sub-rate clock signal is one Nth of the frequency of said input clock signal, where N is chosen such that the ratio of the data word transmission rate of said transmitter to the sub-rate clock signal to insure that any clock signal recovered from said data word has a jitter that is less than a predetermined jitter rate.
Claim 6
Dependent Claim 48 words
The transmitter of claim 1 further comprising elastic store means for storing inputted data words using said input clock signal and for outputting said stored data words into adjacent data words transmitted from said transmitter using a transmitter data clock which operates asynchronous to said input clock signal.
Claim 7
Dependent Claim 163 words
A data communication system including a transmitter and a receiver connected together over a communication channel, said transmitter comprising means for generating an input data word from an input analog signal sampled by an input clock signal, said input clock signal being derived independently of said input analog signal, means for dividing down said input clock signal to obtain a sub-rate frequency clock signal which is substantially below and operates asynchronously to a data word transmission rate of said transmitter and means for combining a logic state sample of said sub-rate clock signal together with said input data word to form each data word to be transmitted in a packet data format from said transmitter; and said receiver comprising means for extracting said logic state sample from each of said data words received from said transmitter and phase lock loop for generating, from said logic state sample, a recovered clock signal of the same frequency and substantially in phase with said input clock.
Claim 8
Dependent Claim 163 words
A data communication system including a transmitter and a receiver connected together over a communication channel, said transmitter comprising means for generating an input data word from an input analog signal sampled by an input clock signal, said input clock signal being derived independently of said input analog signal, means for dividing down said input clock signal to obtain a sub-rate frequency clock signal which is substantially below and operates asynchronously to a data word transmission rate of said transmitter and means for combining a logic state sample of said sub-rate clock signal together with said input data word to form each data word to be transmitted in a packet data format from said transmitter; and said receiver comprising means for extracting said logic state sample from each of said data words received from said transmitter and phase lock loop for generating, from said logic state sample, a recovered clock signal of the same frequency and substantially in phase with said input clock.
Claim 9
Dependent Claim 30 words
The system of claim 6 wherein said sub-rate clock signal is one Nth of the frequency of said input clock signal, where N is greater than or equal to 2.
Claim 10
Dependent Claim 65 words
The system of claim 6 wherein said sub-rate clock signal is one Nth of the frequency of said input clock signal, where N is chosen such that the ratio of the data word transmission rate of said system to the sub-rate clock signal frequency results in a recovered receiver clock jitter that is less than a predetermined jitter rate established for said recovered clock signal.
Claim 11
Dependent Claim 105 words
The system of claim 6 wherein said transmitter further comprises elastic store means for storing inputted data words using said input clock signal and for outputting said stored data words into adjacent data words transmitted from said transmitter over said communication channel using a transmitter data clock which operates asynchronous to said input clock signal and wherein said receiver further comprises elastic store means for storing adjacent data words received over said communication channel from said transmitter using a receiver data clock signal which operates synchronous to said transmitter data clock signal and for outputting said stored adjacent data words using said recovered clock signal.
Claim 12
Independent Claim 134 words
A method of operating a transmitter apparatus to communicate an input digital data word and an input clock signal over a communication channel at a data word transmission rate which operates asynchronously with respect to said input clock signal, said method comprising the steps of generating said input data word from an input analog signal sampled by said input clock signal, said input clock signal being derived independently of said input analog signal, dividing said input clock signal by a predetermined integer to obtain a sub-rate frequency clock signal which is substantially below a data word transmission rate of said transmitter and combining a logic state sample of said sub-rate clock signal together with said input data word to form each data word to be transmitted in a packet data format from said transmitter.
Claim 13
Independent Claim 134 words
A method of operating a transmitter apparatus to communicate an input digital data word and an input clock signal over a communication channel at a data word transmission rate which operates asynchronously with respect to said input clock signal, said method comprising the steps of generating said input data word from an input analog signal sampled by said input clock signal, said input clock signal being derived independently of said input analog signal, dividing said input clock signal by a predetermined integer to obtain a sub-rate frequency clock signal which is substantially below a data word transmission rate of said transmitter and combining a logic state sample of said sub-rate clock signal together with said input data word to form each data word to be transmitted in a packet data format from said transmitter.
Claim 14
Dependent Claim 65 words
The method of claim 10 wherein said sub-rate clock signal is one Nth of the frequency of said input clock signal, where N is chosen such that the ratio of the data word transmission rate of said transmitter to the sub-rate clock signal to insure that any clock signal recovered from said data word has a jitter that is less than a predetermined jitter rate.
Claim 15
Independent Claim 179 words
A method of operating a data communication system including a transmitter and a receiver connected together over a communication channel, said method, at said transmitter, comprising the steps of accepting an input clock signal which is asynchronous with respect to a data word transmission clock of said transmitter, generating an input data word from an input analog signal sampled by an input clock signal, said input clock signal being derived independently of said input analog signal, dividing down said input clock signal to obtain a sub-rate frequency clock signal which is substantially below and operates asynchronously to a data word transmission rate of said transmitter, combining a logic state sample of said sub-rate clock signal together with said input data word to form each data word to be transmitted in a packet data format from said transmitter; and at said receiver extracting said logic state sample from each of said data words received from said transmitter and generating, from said logic state sample, a recovered clock signal of the same frequency and substantially in phase with said input clock.
Claim 16
Independent Claim 179 words
A method of operating a data communication system including a transmitter and a receiver connected together over a communication channel, said method, at said transmitter, comprising the steps of accepting an input clock signal which is asynchronous with respect to a data word transmission clock of said transmitter, generating an input data word from an input analog signal sampled by an input clock signal, said input clock signal being derived independently of said input analog signal, dividing down said input clock signal to obtain a sub-rate frequency clock signal which is substantially below and operates asynchronously to a data word transmission rate of said transmitter, combining a logic state sample of said sub-rate clock signal together with said input data word to form each data word to be transmitted in a packet data format from said transmitter; and at said receiver extracting said logic state sample from each of said data words received from said transmitter and generating, from said logic state sample, a recovered clock signal of the same frequency and substantially in phase with said input clock.

References Cited (Backward Citations)

US4731646A Cited
US4718074A Cited
US5014271A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-10-03 1998-04-04 1998-10-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-10-03 2002-04-04 2002-10-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-10-03 2006-04-04 2006-10-04 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag