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US5394249A Expired / Lapsed US ⏱️ 0.0 years remaining

Multisystem adaptable type signal processing and recording/reproducing apparatus

Assignee: Toshiba Corp
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Filing: 1993-07-12
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Granted: 1995-02-28
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Expires: 2013-07-12
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Abstract

Abstract When the low bit rate coding is effected in a recording system 1A, a signal is coded and recorded in a hierarchical structure. On the reproduction side, the type of a recorded signal (the low bit rate coded signal of the hierarchical structure, non-hierarchical structure, conventional analog recording or the like) is determined by a determination system 1E and the operation modes of a digital signal processing system 1G and an analog signal processing system 1F are set. The analog signal processing system processes a reproduced signal when it is analog signal. The digital signal processing system processes a reproduced signal when it is a digital signal or when a reproduced output from the analog signal processing system is processed in a digital manner. Further, hierarchical decoding G30 and inverse converting G40 are provided, a signal processed in the hierarchical structure can be restored to an original form, and the restored reproduced signal can be processed by use of system conversion G60 and converted to a desired system and output. As a result, various types of input video signals can be recorded in a preset form and various forms of recorded video signals can be reproduced and output in a desired form. Further, an analog recorded signal can be reproduced and output after converted to a desired form.

Inventors

  • 👤 Kenji Shimoda
  • 👤 Hideo Tsurufusa
  • 👤 Shinji Yoda
  • 👤 Kazuyoshi Fuse

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 18:08
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/76; H04N5/91; H04N5/92; H04N21/00; H04N21/20; H04N21/23; H04N21/236; H04N19/00; H04N19/10; H04N19/102; H04N19/124; H04N19/126; H04N19/60; H04N19/61; H04N21/40; H04N21/43; H04N21/434; H04N5/78; H04N5/782; H04N5/7824; H04N5/7826; H04N5/78263; H04N9/00; H04N9/79; H04N9/7921; H04N9/7925; H04N9/80; H04N9/804; H04N9/8042; H04N9/8047; H04N9/87; H04N9/877; H04N19/103; H04N19/107; H04N19/132; H04N19/30

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 254 words
A multisystem signal processing apparatus comprising: low bit rate coding means for hierarchical coding different types of input video signals in a hierarchical structure and setting different hierarchical levels for said different types of input video signals; recording means for recording an output of said low bit rate coding means on tracks set for the respective hierarchical levels; pick-up means for picking up a signal on one of the tracks; determining means for determining the contents of the hierarchical level of an output signal from said pick-up means; analog reproducing signal processing means for processing an output signal of said pick-up means in an analog fashion; digital reproducing signal processing means for processing an output signal of said pick-up means in a digital fashion; hierarchical decoding means for decoding a hierarchical coded signal in response to a determination signal from said determining means when an output of said digital reproducing signal processing means is coded in a hierarchical structure; inverse transforming means for inversely transforming an output of said hierarchical decoding means to restore the same to an original video signal; non-hierarchical decoding means for decoding a non-hierarchical coded signal in response to a determination signal from said determining means when an output of said digital reproducing signal processing means is coded in a non-hierarchical structure; and system conversion means for selectively receiving an output signal obtained by low-bit-rate coding an output of said analog reproducing signal processing means, an output of said hierarchical decoding means or an output of said non-hierarchical decoding means.
Claim 2
Dependent Claim 254 words
A multisystem signal processing apparatus comprising: low bit rate coding means for hierarchical coding different types of input video signals in a hierarchical structure and setting different hierarchical levels for said different types of input video signals; recording means for recording an output of said low bit rate coding means on tracks set for the respective hierarchical levels; pick-up means for picking up a signal on one of the tracks; determining means for determining the contents of the hierarchical level of an output signal from said pick-up means; analog reproducing signal processing means for processing an output signal of said pick-up means in an analog fashion; digital reproducing signal processing means for processing an output signal of said pick-up means in a digital fashion; hierarchical decoding means for decoding a hierarchical coded signal in response to a determination signal from said determining means when an output of said digital reproducing signal processing means is coded in a hierarchical structure; inverse transforming means for inversely transforming an output of said hierarchical decoding means to restore the same to an original video signal; non-hierarchical decoding means for decoding a non-hierarchical coded signal in response to a determination signal from said determining means when an output of said digital reproducing signal processing means is coded in a non-hierarchical structure; and system conversion means for selectively receiving an output signal obtained by low-bit-rate coding an output of said analog reproducing signal processing means, an output of said hierarchical decoding means or an output of said non-hierarchical decoding means.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-02-27 1998-08-29 1999-02-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-02-27 2002-08-29 2003-02-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-02-27 2006-08-29 2007-02-28 $7700.00 Window Closed / Lapsed

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