US5396127A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Programmable application specific integrated circuit and logic cell therefor
Assignee: QuickLogic Corp
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Filing: 1994-03-29
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Granted: 1995-03-07
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Expires: 2014-03-29
Abstract
Abstract A field programmable gate array includes a programmable routing network, a programmable configuration network integrated with the programmable routing network; and a logic cell integrated with the programmable configuration network. The logic cell includes four two-input AND gates, two six-input AND gates, three multiplexers, and a delay flipflop. The logic cell is a powerful general purpose universal logic building block suitable for implementing most TTL and gate array macrolibrary functions. A considerable variety of functions are realizable with one cell delay, including combinational logic functions as wide as thirteen inputs, all boolean transfer functions for up to three inputs, and sequential flipflop functions such as T, JK and count with carry-in.
Inventors
- 👤 Andrew K. Chan
- 👤 Hua-Thye Chua
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 23:55
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17736; H03K19/1733; H03K19/1737; H03K19/17704; H03K19/17724; H03K19/17728; H03K19/1774; H03K19/1778; H03K19/17792
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
182 words
A programmable application specific integrated circuit comprising: an interconnect structure comprising a plurality of conductors and a plurality of antifuses, the antifuses being programmable to connect selected ones of the plurality of conductors; and a plurality of logic modules, each of said logic modules comprising: a first multiplexer having a first data input lead, a second data input lead, a select input lead, and an output lead; a second multiplexer having a first data input lead, a second data input lead, a select input lead, and an output lead; a third multiplexer having a first data input lead, a second data input lead, a select input lead, and an output lead, the first data input lead of the third multiplexer being connected to the output lead of the first multiplexer, the second data input lead of the third multiplexer being connected to the output lead of the second multiplexer; and a flip-flop having a data input lead, a clock input lead, and an output lead, the data input lead of the flip-flop being connected to the output lead of the third multiplexer.
Claim 2
Dependent Claim
182 words
A programmable application specific integrated circuit comprising: an interconnect structure comprising a plurality of conductors and a plurality of antifuses, the antifuses being programmable to connect selected ones of the plurality of conductors; and a plurality of logic modules, each of said logic modules comprising: a first multiplexer having a first data input lead, a second data input lead, a select input lead, and an output lead; a second multiplexer having a first data input lead, a second data input lead, a select input lead, and an output lead; a third multiplexer having a first data input lead, a second data input lead, a select input lead, and an output lead, the first data input lead of the third multiplexer being connected to the output lead of the first multiplexer, the second data input lead of the third multiplexer being connected to the output lead of the second multiplexer; and a flip-flop having a data input lead, a clock input lead, and an output lead, the data input lead of the flip-flop being connected to the output lead of the third multiplexer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-03-06 | 1998-09-05 | 1999-03-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-03-06 | 2002-09-05 | 2003-03-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-03-06 | 2006-09-05 | 2007-03-07 | $7700.00 | Window Closed / Lapsed |