US5402318A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor integrated circuit device
Assignee: Renesas Electronics Corp
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Filing: 1993-09-03
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Granted: 1995-03-28
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Expires: 2013-09-03
Abstract
Abstract A semiconductor circuit device includes a multi-layered substrate comprising a plurality of signal lines sandwiched between a power source line and a ground line, with insulation layers formed therebetween to reduce fluctuation of a ground line potential at the time of simultaneous switching of the signal lines and to increase the operational speed. The signal lines provides bidirectional current paths and is disposed between the current source line and the ground line. The multi-layered substrate is formed around a semiconductor pellet. Electrode pads are formed on the insulation layer over the ground line on the same level as the signal lines and generally on the same level as the main surface of the semiconductor pellet where electrodes pads are formed. Bonding wires are used to electrically connect the electrode pads on the pellet and the electrodes formed on the insulation layer. Additional bonding wires are used to electrically connect the electrode pads formed on the insulation layer and electrode pads formed on the power source line which is at a higher level and further away from the electrode pads formed on the insulation layer. Some of the electrode pads formed on the insulation layer is directly connected to the ground line using a side plate extension.
Inventors
- 👤 Kanji Otsuka
- 👤 Takayuki Okinaga
- 👤 Yuji Shirai
- 👤 Takashi Miwa
- 👤 Toshihiro Tsuboi
- 👤 Shouji Matsugami
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 07:29
CPC Classifications
H; H10; H10W; H10W72/00; H10W44/00; H10W44/501; H10W70/00; H10W70/60; H10W70/67; H10W70/68; H10W70/685; H10W44/20; H10W44/203; H10W44/206; H10W70/682; H10W72/071; H10W72/075; H10W72/07551; H10W72/07554; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/541; H10W72/5445; H10W72/547; H10W72/5473; H10W72/5475; H10W72/551; H10W72/552; H10W72/5522; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W74/00; H10W90/00; H10W90/701; H10W90/751; H10W90/754; H10W90/756
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
315 words
A semiconductor integrated circuit device comprising: a semiconductor pellet having a main surface and a rear surface opposite said main surface, a plurality of electrode pads formed on said main surface; an insulating multi-layered substrate comprising a first conductive layer, a second conductive layer, a plurality of signal conductive strips, and first and second insulating layers, said second insulating layer being stacked on said first insulating layer, said signal conductive strips being formed between said first and second insulating layers, said first insulating layer being stacked over said first conductive layer, and said second conductive layer being stacked on said second insulating layer, wherein said insulating multi-layered substrate is formed around said semiconductor pellet; a plurality of first and second conductive strips formed over said first conductive layer and on said first insulating layer, wherein said first conductive strips are electrically connected to said first conductive layer, wherein said second conductive layer is for supplying a first reference potential to said semiconductor pellet and said first conductive layer is for supplying a second reference potential to said semiconductor pellet; first bonding wires, second bonding wires and third bonding wires, each of said first bonding wires being electrically connected to one of said electrode pads and one of said first conductive strips, each of said second wires being electrically connected to one of said electrode pads and to one of said second conductive strips, and each of said third bonding wires being electrically connected to one of said electrode pads and to said signal conductive strips; a plurality fourth bonding wires, each electrically connected to said second conductive layer and one of said second conductive strips; a plurality of external extension leads electrically connected to said signal conductive strips; and a resin molding body in which said semiconductor pellet, said multi-layered substrate, said wires and a part of each of said external extension leads are molded.
Claim 2
Dependent Claim
315 words
A semiconductor integrated circuit device comprising: a semiconductor pellet having a main surface and a rear surface opposite said main surface, a plurality of electrode pads formed on said main surface; an insulating multi-layered substrate comprising a first conductive layer, a second conductive layer, a plurality of signal conductive strips, and first and second insulating layers, said second insulating layer being stacked on said first insulating layer, said signal conductive strips being formed between said first and second insulating layers, said first insulating layer being stacked over said first conductive layer, and said second conductive layer being stacked on said second insulating layer, wherein said insulating multi-layered substrate is formed around said semiconductor pellet; a plurality of first and second conductive strips formed over said first conductive layer and on said first insulating layer, wherein said first conductive strips are electrically connected to said first conductive layer, wherein said second conductive layer is for supplying a first reference potential to said semiconductor pellet and said first conductive layer is for supplying a second reference potential to said semiconductor pellet; first bonding wires, second bonding wires and third bonding wires, each of said first bonding wires being electrically connected to one of said electrode pads and one of said first conductive strips, each of said second wires being electrically connected to one of said electrode pads and to one of said second conductive strips, and each of said third bonding wires being electrically connected to one of said electrode pads and to said signal conductive strips; a plurality fourth bonding wires, each electrically connected to said second conductive layer and one of said second conductive strips; a plurality of external extension leads electrically connected to said signal conductive strips; and a resin molding body in which said semiconductor pellet, said multi-layered substrate, said wires and a part of each of said external extension leads are molded.
Claim 3
Dependent Claim
56 words
A semiconductor integrated circuit device according to claim 1, wherein said first conductive layer includes a side plate formed on a side surface of said first insulating layer which faces to a side surface formed between said main and said rear surfaces of said pellet, said side plate being unitarily formed with said first conductive strips.
Claim 4
Dependent Claim
21 words
A semiconductor integrated circuit device according to claim 1, wherein said second conductive layer is a power source potential supplying layer.
Claim 5
Dependent Claim
20 words
A semiconductor integrated circuit device according to claim 1, wherein said first conductive layer is a ground potential supplying layer.
Claim 6
Dependent Claim
44 words
A semiconductor integrated circuit device according to claim 1, further comprising: a through-hole formed in said second insulating layer, a conductive material formed in said through-hole, said conductive material being electrically connected to said second conductive layer and one of said second conductive strips.
Claim 7
Dependent Claim
18 words
A semiconductor integrated circuit device according to claim 1, wherein said signal conductive strips provide bidirectional current paths.
Claim 8
Dependent Claim
33 words
A semiconductor integrated circuit device according to claim 1, wherein at least one of said second conductive strips is electrically connected to said second conductive layer with two of said fourth bonding wires.
Claim 9
Dependent Claim
34 words
A semiconductor integrated circuit device according to claim 1, wherein at least one of said second conductive strips is electrically connected to one of said electrode pads with two of said third bonding wires.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-03-27 | 1998-09-26 | 1999-03-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-03-27 | 2002-09-26 | 2003-03-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-03-27 | 2006-09-26 | 2007-03-28 | $7700.00 | Window Closed / Lapsed |