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US5406508A Expired / Lapsed US ⏱️ 0.0 years remaining

Content addressable memory and method of use thereof

Assignee: Kawasaki Microelectronics Inc
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Filing: 1993-09-28
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Granted: 1995-04-11
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Expires: 2013-09-28
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Abstract

Abstract In a content addressable memory, a plurality of non-volatile memory cells each are provided in conjunction with the associated one of a plurality of match lines, thresholds of the plurality of non-volatile memory cells are selectively altered on the basis of a teacher-signal, and in read out of data, selected is a match line associated with a non-volatile memory cell having a maximum weight, if the match signal appears on a plurality of match lines, the thresholds of the non-volatile memory cells being treated as the weights, thereby reading out data which has been stored in the word memory involved in the maximum weight.

Inventors

  • 👤 Izumi Hayashibara

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 16:53
CPC Classifications
G; G11; G11C; G11C15/00; G11C15/04; G11C15/046

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 171 words
A content addressable memory comprising: a plurality of word memories each for storing digital data in units of words; a plurality of match lines, each of said plurality of match lines associated with a corresponding one of said plurality of word memories; a data retrieval circuit adapted to receive retrieval data and to output match signals to at least one of said plurality of match lines associated with word memories storing one of a bit pattern and a portion of a bit pattern similar to that of the retrieval data; a plurality of weight memory circuits, each of said plurality of weight memory circuits associated with a corresponding one of said plurality of match lines; a weight alteration circuit for selectively altering weights stored in said plurality of weight memory circuits in accordance with a predetermined teacher-signal; and a selection circuit for selecting a match line associated with a weight memory circuit having a maximum weight, if a match signal appears on more than one of said plurality of match lines.
Claim 2
Dependent Claim 171 words
A content addressable memory comprising: a plurality of word memories each for storing digital data in units of words; a plurality of match lines, each of said plurality of match lines associated with a corresponding one of said plurality of word memories; a data retrieval circuit adapted to receive retrieval data and to output match signals to at least one of said plurality of match lines associated with word memories storing one of a bit pattern and a portion of a bit pattern similar to that of the retrieval data; a plurality of weight memory circuits, each of said plurality of weight memory circuits associated with a corresponding one of said plurality of match lines; a weight alteration circuit for selectively altering weights stored in said plurality of weight memory circuits in accordance with a predetermined teacher-signal; and a selection circuit for selecting a match line associated with a weight memory circuit having a maximum weight, if a match signal appears on more than one of said plurality of match lines.
Claim 3
Dependent Claim 87 words
A content addressable memory according to claim 1, wherein each of said plurality of weight memory circuits has a non-volatile memory cell associated with the corresponding one of said plurality of match lines, said weight alteration circuit selectively alters thresholds of the plurality of non-volatile memory cells, each of said thresholds representing a weight, and said selection circuit selects a match line associated with a non-volatile memory cell having a maximum weight, if the match signal appears on more than one of said plurality of match lines.
Claim 4
Dependent Claim 48 words
A content addressable memory according to claim 2, wherein said weight alteration circuit selectively performs an erase procedure on a unit time basis on arbitrary ones of said plurality of non-volatile memory cells which have been subjected to an initial writing procedure to establish a predetermined threshold level.
Claim 5
Independent Claim 297 words
A method of using a content addressable memory comprising: a plurality of word memories, each of said plurality of word memories for storing digital data in units of words; a plurality of match lines, each of said plurality of match lines associated with a corresponding one of said plurality of word memories; a data retrieval circuit adapted to receive retrieval data and to output match signals to at least one of said plurality of match lines associated with word memories storing one of a bit pattern and a portion of bit pattern similar to that of the retrieval data; a plurality of weight memory circuits, each of said plurality of weight memory circuits associated with a corresponding one of said plurality of match lines; a weight alteration circuit for selectively altering weights stored in said plurality of weight memory circuits in accordance with a predetermined teacher-signal; and a selection circuit for selecting a match line associated with a weight memory circuit having a maximum weight, if a match signal appears on more than one of said plurality of match lines; wherein the method of using said content addressable memory comprises the steps of: inputting the retrieval data into said content addressable memory; receiving from said content addressable memory a first retrieval result corresponding to the retrieval data; requiring said content addressable memory to output a second retrieval result in a next sequence when the first retrieval result is not a desired retrieval result; and inputting the predetermined teacher-signal into said content addressable memory, when a retrieval result is the desired retrieval result, and causing a weight memory circuit associated with a word memory storing data corresponding to the desired retrieval result to store a second weight greater than a first weight stored in said weight memory circuit.
Claim 6
Independent Claim 297 words
A method of using a content addressable memory comprising: a plurality of word memories, each of said plurality of word memories for storing digital data in units of words; a plurality of match lines, each of said plurality of match lines associated with a corresponding one of said plurality of word memories; a data retrieval circuit adapted to receive retrieval data and to output match signals to at least one of said plurality of match lines associated with word memories storing one of a bit pattern and a portion of bit pattern similar to that of the retrieval data; a plurality of weight memory circuits, each of said plurality of weight memory circuits associated with a corresponding one of said plurality of match lines; a weight alteration circuit for selectively altering weights stored in said plurality of weight memory circuits in accordance with a predetermined teacher-signal; and a selection circuit for selecting a match line associated with a weight memory circuit having a maximum weight, if a match signal appears on more than one of said plurality of match lines; wherein the method of using said content addressable memory comprises the steps of: inputting the retrieval data into said content addressable memory; receiving from said content addressable memory a first retrieval result corresponding to the retrieval data; requiring said content addressable memory to output a second retrieval result in a next sequence when the first retrieval result is not a desired retrieval result; and inputting the predetermined teacher-signal into said content addressable memory, when a retrieval result is the desired retrieval result, and causing a weight memory circuit associated with a word memory storing data corresponding to the desired retrieval result to store a second weight greater than a first weight stored in said weight memory circuit.
Claim 7
Dependent Claim 34 words
The content addressable memory of claim 1, wherein said weight alteration circuit alters a weight corresponding to a matched word based on a number of times the matched word is selected by a user.
Claim 8
Dependent Claim 25 words
The content addressable memory of claim 1, further comprising output means for outputting a word having the maximum weight in a set of retrieved words.
Claim 9
Dependent Claim 34 words
The method of claim 4, further comprising altering, with said weight alteration circuit, a weight corresponding to a matched word based on a number of times the matched word is selected by a user.
Claim 10
Dependent Claim 25 words
The method of claim 4, further comprising outputting, with said content addressable memory, a word having the maximum weight in a set of retrieved words.

References Cited (Backward Citations)

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US4890260A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-04-10 1998-10-10 1999-04-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-04-10 2002-10-10 2003-04-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-04-10 2006-10-10 2007-04-11 $7700.00 Window Closed / Lapsed

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