Claims Analysis
Total Claims: 37
Claim 1
Independent Claim
151 words
A system comprising: a system bus; system modules coupled to said system bus including a processor; a local bus coupled to said processor; arbitration circuitry coupled to said local bus and said system bus, said arbitration circuitry including distributed mode operation circuitry which responds to a first signal allowing said arbitration circuitry to use distributed mode arbitration techniques to determine which system module gains access of said system bus, central mode operation circuitry which responds to a second signal allowing a central arbiter to use central mode arbitration techniques to determine which system module gains access to said system bus, and protocol control circuitry coupled to said arbitration circuitry, said system bus, and said local bus, for transferring information between said local bus and said system bus; said protocol control circuitry providing said first and second signal to said arbitration circuitry for selecting between distributed mode and said central mode operations.
Claim 2
Independent Claim
151 words
A system comprising: a system bus; system modules coupled to said system bus including a processor; a local bus coupled to said processor; arbitration circuitry coupled to said local bus and said system bus, said arbitration circuitry including distributed mode operation circuitry which responds to a first signal allowing said arbitration circuitry to use distributed mode arbitration techniques to determine which system module gains access of said system bus, central mode operation circuitry which responds to a second signal allowing a central arbiter to use central mode arbitration techniques to determine which system module gains access to said system bus, and protocol control circuitry coupled to said arbitration circuitry, said system bus, and said local bus, for transferring information between said local bus and said system bus; said protocol control circuitry providing said first and second signal to said arbitration circuitry for selecting between distributed mode and said central mode operations.
Claim 3
Dependent Claim
26 words
The system of claim 1 wherein said arbitration circuitry further comprises: common hardware interface circuitry for enabling software independence for distributed mode and central mode operations.
Claim 4
Dependent Claim
52 words
The system of claim 1 further comprising: transceivers coupled to said arbitration circuitry and said protocol control circuitry for changing output signals from said arbitration circuitry to Backplane Transistor Logic (BTL) format used by said system bus and for allowing said arbitration circuitry output signals to be input onto said system bus.
Claim 5
Dependent Claim
33 words
The system of claim 1 wherein said arbitration circuitry comprises: an arbitration protocol sequencer coupled to said protocol control circuitry; and register circuitry coupled to said arbitration protocol sequencer and said local bus.
Claim 6
Dependent Claim
30 words
The system of claim 4 wherein the register circuitry comprises: a register for making dynamic mode changes possible by indicating whether the system is operating in central or distributed modes.
Claim 7
Dependent Claim
23 words
The system of claim 4 wherein the register circuitry comprises: a register for indicating whether or not said system module is master enabled.
Claim 8
Dependent Claim
19 words
The system of claim 4 wherein the register circuitry comprises: at least one register for storing an arbitration message.
Claim 9
Dependent Claim
20 words
The system of claim 4 wherein the register circuitry comprises: at least one register for dynamically storing a priority level.
Claim 10
Dependent Claim
28 words
The system of claim 4 wherein the register circuitry comprises: at least one register for storing the configuration, control, status, and test information needed for system bus arbitration.
Claim 11
Dependent Claim
12 words
The system of claim 1 wherein said system bus is a Futurebus+.
Claim 12
Dependent Claim
158 words
An arbiter circuit, comprising: an arbitration protocol sequencer for providing a common hardware protocol, between said arbiter circuit and any device desiring access to a system bus for distributed mode and central mode operation, said distributed mode operation using distributed mode arbitration techniques for allowing said arbiter circuit to determine which device gains access to said system bus, said central mode operation using central mode arbitration techniques for allowing a central arbiter to determine which device gains access to said system bus, said common hardware protocol provided by emulating a central mode arbitration sequence during distributed mode operation, and disabling itself and allowing a central mode arbiter to provide the central mode arbitration sequence during central mode operation; and register circuitry coupled to said arbitration protocol sequencer having common hardware interface circuitry for enabling software independence for distributed mode and central mode operations; wherein the mode of operation is determined by examining a bit in said register circuitry.
Claim 13
Dependent Claim
158 words
An arbiter circuit, comprising: an arbitration protocol sequencer for providing a common hardware protocol, between said arbiter circuit and any device desiring access to a system bus for distributed mode and central mode operation, said distributed mode operation using distributed mode arbitration techniques for allowing said arbiter circuit to determine which device gains access to said system bus, said central mode operation using central mode arbitration techniques for allowing a central arbiter to determine which device gains access to said system bus, said common hardware protocol provided by emulating a central mode arbitration sequence during distributed mode operation, and disabling itself and allowing a central mode arbiter to provide the central mode arbitration sequence during central mode operation; and register circuitry coupled to said arbitration protocol sequencer having common hardware interface circuitry for enabling software independence for distributed mode and central mode operations; wherein the mode of operation is determined by examining a bit in said register circuitry.
Claim 14
Dependent Claim
36 words
The circuit of claim 11 wherein said arbiter circuit performs central arbitration functions including; receiving bus mastership requests from all system modules requiring bus mastership; and granting bus mastership to any one of said system modules.
Claim 15
Dependent Claim
14 words
The circuit of claim 12 further including receiving priority updates from a system bus.
Claim 16
Dependent Claim
31 words
The arbiter circuit of claim 11 wherein said arbiter circuit is capable of dymanically switching from servicing a system module in central mode to servicing said system module in distributed mode.
Claim 17
Dependent Claim
30 words
The arbiter circuit of claim 11 wherein said arbiter circuit is capable of switching from servicing a system module in distributed mode to servicing said system module in central mode.
Claim 18
Independent Claim
113 words
A method of communication between arbitration circuitry and its system module to utilize the arbitration process to determine which system module gains access to a system bus comprising the steps of: receiving service requests from said system module; determining whether the system is operating in distributed mode or central mode; sending a distributed mode arbitration message to said system module if the system is operating in distributed mode; sending a central mode arbitration message to said system module if the system is operating in central mode; and sending an indication to said system module that said operation is completed; wherein common hardware protocol is used for said central mode and distributed mode operations.
Claim 19
Independent Claim
113 words
A method of communication between arbitration circuitry and its system module to utilize the arbitration process to determine which system module gains access to a system bus comprising the steps of: receiving service requests from said system module; determining whether the system is operating in distributed mode or central mode; sending a distributed mode arbitration message to said system module if the system is operating in distributed mode; sending a central mode arbitration message to said system module if the system is operating in central mode; and sending an indication to said system module that said operation is completed; wherein common hardware protocol is used for said central mode and distributed mode operations.
Claim 20
Dependent Claim
17 words
The method of claim 16 wherein said method is used to gain mastership of a system bus.
Claim 21
Dependent Claim
13 words
The method of claim 16 wherein said method is used to send messages.
Claim 22
Dependent Claim
14 words
The method of claim 16 wherein said method is used to update a priority.
Claim 23
Independent Claim
114 words
A method of communication between arbitration circuitry and its system module to utilize the arbitration process to determine which system module gains access to a system bus comprising the steps of: receiving service requests from a system module; determining whether the system is operating in central mode or distributed mode; sending a distributed mode arbitration message to said system module if the system is operating in distributed mode; sending a central mode arbitration message to said system module if the system is operating in central mode; and sending an indication to said system module that said operation is completed; wherein common hardware interface circuitry enables software independence for distributed mode and central mode operations.
Claim 24
Independent Claim
114 words
A method of communication between arbitration circuitry and its system module to utilize the arbitration process to determine which system module gains access to a system bus comprising the steps of: receiving service requests from a system module; determining whether the system is operating in central mode or distributed mode; sending a distributed mode arbitration message to said system module if the system is operating in distributed mode; sending a central mode arbitration message to said system module if the system is operating in central mode; and sending an indication to said system module that said operation is completed; wherein common hardware interface circuitry enables software independence for distributed mode and central mode operations.
Claim 25
Dependent Claim
20 words
The method of claim 20 wherein said receiving and determining steps are used to gain mastership of a system bus.
Claim 26
Dependent Claim
16 words
The method of claim 20 wherein said receiving and determining steps are used to send messages.
Claim 27
Dependent Claim
14 words
The method of claim 20 wherein said method is used to update a priority.
Claim 28
Independent Claim
136 words
A method of receiving arbitrated messages comprising the steps of: monitoring a system bus; determining mode of the system operation by examining the status of a bit located in a register; receiving and storing said arbitrated messages; and sending an indication to a system module that said arbitrated message has been received; said distributed mode operation using distributed mode operation techniques for allowing an arbiter circuit on each system module to determine which system module gains access to said system bus; said central mode operation using central mode arbitration techniques for allowing a central arbiter to determine which system module gains access to said system bus; wherein said determining, receiving, and sending steps are performed when the hardware interface circuitry is operating in both the distributed mode and central mode, and therefore, software independence is achieved.
Claim 29
Independent Claim
136 words
A method of receiving arbitrated messages comprising the steps of: monitoring a system bus; determining mode of the system operation by examining the status of a bit located in a register; receiving and storing said arbitrated messages; and sending an indication to a system module that said arbitrated message has been received; said distributed mode operation using distributed mode operation techniques for allowing an arbiter circuit on each system module to determine which system module gains access to said system bus; said central mode operation using central mode arbitration techniques for allowing a central arbiter to determine which system module gains access to said system bus; wherein said determining, receiving, and sending steps are performed when the hardware interface circuitry is operating in both the distributed mode and central mode, and therefore, software independence is achieved.
Claim 30
Independent Claim
137 words
A method of performing a priority update in an arbiter circuit when a system is operating in central mode and distributed mode comprising the steps of: writing a priority value to a priority register; determining whether said system is operating in distributed or central mode by examining the status of a bit located in a register; issuing an interrupt signal to a local bus if said system is operating in distributed mode signifying that the priority is updated; determining which priority is to be updated if said system is operating in central mode; sending a priority update message appropriate for said determined priority if in central mode; monitoring whether said message has been sent over a system bus; and issuing an interrupt if said message has been sent and if said system is operating in central mode.
Claim 31
Independent Claim
137 words
A method of performing a priority update in an arbiter circuit when a system is operating in central mode and distributed mode comprising the steps of: writing a priority value to a priority register; determining whether said system is operating in distributed or central mode by examining the status of a bit located in a register; issuing an interrupt signal to a local bus if said system is operating in distributed mode signifying that the priority is updated; determining which priority is to be updated if said system is operating in central mode; sending a priority update message appropriate for said determined priority if in central mode; monitoring whether said message has been sent over a system bus; and issuing an interrupt if said message has been sent and if said system is operating in central mode.
Claim 32
Dependent Claim
18 words
The method of claim 25 wherein common hardware protocol is used for distributed mode and central mode operations.
Claim 33
Dependent Claim
19 words
The method of claim 25 wherein common hardware interface circuitry enables software independence for distributed mode and central mode.
Claim 34
Independent Claim
93 words
A method of sending a general arbitration message to a module of a system from an arbiter circuit operating in distributed mode and central mode comprising the steps of: writing said general arbitration message to a message register; determining whether said system is operating in central mode or distributed mode; sending a central mode arbitration message or distributed mode arbitration message to said module from said arbiter circuit in response to said determination; and issuing an interrupt signal to a local bus indicating that one of said mode arbitration messages has been sent.
Claim 35
Independent Claim
93 words
A method of sending a general arbitration message to a module of a system from an arbiter circuit operating in distributed mode and central mode comprising the steps of: writing said general arbitration message to a message register; determining whether said system is operating in central mode or distributed mode; sending a central mode arbitration message or distributed mode arbitration message to said module from said arbiter circuit in response to said determination; and issuing an interrupt signal to a local bus indicating that one of said mode arbitration messages has been sent.
Claim 36
Dependent Claim
18 words
The method of claim 28 wherein common hardware protocol is used for distributed mode and central mode operations.
Claim 37
Dependent Claim
19 words
The method of claim 28 wherein common hardware interface circuitry enables software independence for distributed mode and central mode.