← Back to Patent Explorer
US5422302A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for producing a three-dimensional semiconductor device

Assignee: Canon Inc
•
Filing: 1992-11-10
•
Granted: 1995-06-06
•
Expires: 2012-11-10
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor device has an insulated gate type transistor. The insulated gate type transistor is formed on an insulating surface of substrate. The insulated gate type transistor is formed in a single crystal layer which is grown from a single nucleus formed on nucleation region which is provided on said insulating surface, which has sufficiently greater nucleation density than material of said insulating surface and which has sufficiently small size so that only one nucleus can be grown.

Inventors

  • 👤 Takao Yonehara
  • 👤 Masaharu Ozaki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 04:51
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10D; H10D84/00; H10D84/01; H10D84/02; H10D84/03; H10D84/038; H10D88/00; H10D88/01; H10P14/27; H10P14/271; H10P14/2921; H10P14/32; H10P14/3202; H10P14/3204; H10P14/3211; H10P14/3214; H10P14/3221; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3414; H10P14/3418; H10P14/3421; Y; Y10; Y10S; Y10S117/00; Y10S117/913; Y10S148/00; Y10S148/164

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 219 words
A method for producing C-MOS transistor comprising the steps of: i) forming a first conductivity type MOS transistor on a substrate surface; ii) forming an insulating film on the formed MOS transistor and the substrate, wherein a nucleation surface and a non-nucleation surface are formed on a surface of the insulating film above the location of the first conductivity type MOS transistor, wherein the nucleation surface comprises an amorphous insulating material, wherein the nucleation density at the nucleation surface is sufficiently greater than that at the nonnucleation surface, and wherein a size of the nucleation surface is sufficiently smaller than that of the nonnucleation surface; iii) forming a nucleus on the nucleation surface according to a vapor deposition process; iv) growing a single crystalline semiconductor body from the nucleus, the single crystalline semiconductor body having a flat surface, thereby forming a single crystalline semiconductor layer on a surface of the insulating film above the location of the first conductivity type MOS transistor; v) forming in the single crystalline semiconductor layer a second conductivity type MOS transistor, different from the first conductivity type MOS transistor, insulatively separated therefrom, wherein the nucleation surface is at a position outside of a main electrode region of the second conductivity MOS transistor; and vi) connecting the first conductivity type MOS transistor via a wiring.
Claim 2
Independent Claim 219 words
A method for producing C-MOS transistor comprising the steps of: i) forming a first conductivity type MOS transistor on a substrate surface; ii) forming an insulating film on the formed MOS transistor and the substrate, wherein a nucleation surface and a non-nucleation surface are formed on a surface of the insulating film above the location of the first conductivity type MOS transistor, wherein the nucleation surface comprises an amorphous insulating material, wherein the nucleation density at the nucleation surface is sufficiently greater than that at the nonnucleation surface, and wherein a size of the nucleation surface is sufficiently smaller than that of the nonnucleation surface; iii) forming a nucleus on the nucleation surface according to a vapor deposition process; iv) growing a single crystalline semiconductor body from the nucleus, the single crystalline semiconductor body having a flat surface, thereby forming a single crystalline semiconductor layer on a surface of the insulating film above the location of the first conductivity type MOS transistor; v) forming in the single crystalline semiconductor layer a second conductivity type MOS transistor, different from the first conductivity type MOS transistor, insulatively separated therefrom, wherein the nucleation surface is at a position outside of a main electrode region of the second conductivity MOS transistor; and vi) connecting the first conductivity type MOS transistor via a wiring.
Claim 3
Independent Claim 205 words
A method for producing a first conductivity type MOS transistor and a second conductivity type MOS transistor, insulatively isolated, said method comprising steps of: i) forming a nucleation surface and a nonnucleation surface on a substrate having an insulating film, wherein the nucleation surface and the nonnucleation surface are formed on a surface of the insulating film above a location at which the first conductivity type MOS transistor is formed on the substrate, wherein the nucleation surface comprises an amorphous insulating material, wherein the nucleation density at the nucleation surface is sufficiently greater than that at the nonnucleation surface, and wherein a size of the nucleation surface is sufficiently smaller than that of the nonnucleation surface; ii) forming a nucleus on the nucleation surface according to a vapor deposition process; iii) growing a single crystalline semiconductor body from the nucleus, the single crystalline semiconductor body having a flat surface, thereby forming a single crystalline semiconductor layer on a surface of the insulating film above the location of the first conductivity type MOS transistor; and iv) forming the second conductivity type MOS transistor on the single crystalline semiconductor layer, wherein the nucleation surface is positioned below a channel region of the second conductivity type MOS transistor.
Claim 4
Independent Claim 205 words
A method for producing a first conductivity type MOS transistor and a second conductivity type MOS transistor, insulatively isolated, said method comprising steps of: i) forming a nucleation surface and a nonnucleation surface on a substrate having an insulating film, wherein the nucleation surface and the nonnucleation surface are formed on a surface of the insulating film above a location at which the first conductivity type MOS transistor is formed on the substrate, wherein the nucleation surface comprises an amorphous insulating material, wherein the nucleation density at the nucleation surface is sufficiently greater than that at the nonnucleation surface, and wherein a size of the nucleation surface is sufficiently smaller than that of the nonnucleation surface; ii) forming a nucleus on the nucleation surface according to a vapor deposition process; iii) growing a single crystalline semiconductor body from the nucleus, the single crystalline semiconductor body having a flat surface, thereby forming a single crystalline semiconductor layer on a surface of the insulating film above the location of the first conductivity type MOS transistor; and iv) forming the second conductivity type MOS transistor on the single crystalline semiconductor layer, wherein the nucleation surface is positioned below a channel region of the second conductivity type MOS transistor.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-06-05 1998-12-05 1999-06-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-06-05 2002-12-05 2003-06-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-06-05 2006-12-05 2007-06-06 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag