Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
195 words
A uniformity correction signal generating apparatus comprising: vertical address signal generating means for generating an address signal having at least one-to-one correspondence to position coordinates in a vertical direction on a display screen of a display unit, said address signal including an upper address signal Y and a lower address signal y; memory means for storing a correction data corresponding to each value of said upper address signal Y, a correction data D(Y) corresponding to an address Y of said memory means being stored in a location of said address Y of said memory means; and ROM means for vertical interpolation for producing a correction data D(Y) and the lower address signal y, the correction data stored in said memory means being interpolated on the basis of at least 9 correction data values in a 3×3 macro lattice points on said screen, using a hierarchically structured interpolation polynomial expression, wherein a degree of said interpolation polynomial expression is the zeroth degree for a center of said screen, the second degree for each center of four peripheral sides of said screen and the fourth degree of address coordinates for each of four corners of said screen.
Claim 2
Dependent Claim
195 words
A uniformity correction signal generating apparatus comprising: vertical address signal generating means for generating an address signal having at least one-to-one correspondence to position coordinates in a vertical direction on a display screen of a display unit, said address signal including an upper address signal Y and a lower address signal y; memory means for storing a correction data corresponding to each value of said upper address signal Y, a correction data D(Y) corresponding to an address Y of said memory means being stored in a location of said address Y of said memory means; and ROM means for vertical interpolation for producing a correction data D(Y) and the lower address signal y, the correction data stored in said memory means being interpolated on the basis of at least 9 correction data values in a 3×3 macro lattice points on said screen, using a hierarchically structured interpolation polynomial expression, wherein a degree of said interpolation polynomial expression is the zeroth degree for a center of said screen, the second degree for each center of four peripheral sides of said screen and the fourth degree of address coordinates for each of four corners of said screen.
Claim 3
Dependent Claim
63 words
A uniformity correction signal generating apparatus according to claim 1, wherein said vertical address signal generating means is configured by digitizing a vertical deflection current proportional value of the CRT display unit by means of an A/D converter and said apparatus further comprising switch means for replacing an output of said interpolation ROM means by a constant value during a vertical retrace period.
Claim 4
Dependent Claim
91 words
A uniformity correction signal generating apparatus according to claim 1, further comprising horizontal address signal generating means for generating a horizontal address signal and including sawtooth wave generating means for generating a sawtooth wave of a horizontal period and an A/D converter, a retrace period of the sawtooth wave generated by said sawtooth wave generating means being ΔT shorter than a horizontal retrace period of the display unit, a value of said ΔT being selected to be equal to about two times a delay time of a correction signal transmission circuit.
Claim 5
Dependent Claim
53 words
A uniformity correction signal generating apparatus according to claim 1, wherein said vertical address signal generating means comprises a phase detection circuit, a voltage controlled oscillator and a programmable counter, and a start point and an end point of counting of said programmable counter are proportional to a vertical size of the screen.
Claim 6
Dependent Claim
65 words
A uniformity correction signal generating apparatus according to claim 1, wherein said vertical address signal generating means comprises a counter for counting actual scanning lines and conversion means for converting an output of said counter into universal coordinates, and said conversion means performs conversion so that any one section of said upper address signal Y is associated with a substantially equal distance on the screen.