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US5445982A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating nonvolatile semiconductor memory device

Assignee: SK Hynix Inc
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Filing: 1994-03-17
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Granted: 1995-08-29
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Expires: 2014-03-17
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Abstract

Abstract A method of fabricating a nonvolatile semiconductor memory device so as to improve interface properties between a tunneling oxide layer and a floating gate of the nonvolatile semiconductor memory device is disclosed, wherein the method comprises the steps of forming a tunneling oxide layer on a substrate, forming a floating gate consisting of a plurality of thin silicon layers which are formed through the repeated cyclical process under the low temperature of around 550 degrees C., forming an interposed insulating layer over a whole surface of the floating gate by a selective etching process of the silicon layers; and forming a control gate over a whole surface of the interposed insulating layer.

Inventors

  • 👤 Hyun S. Hwang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 16:47
CPC Classifications
H; H10; H10B; H10B41/00; H10B41/30; H10B41/35; H10B69/00; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/60; H10D64/66; H10D64/661; H10P; H10P14/00; H10P14/20; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/40; H10P14/416; H10P95/00; H10P95/90

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 90 words
A method of fabricating a nonvolatile semiconductor memory device, comprising the steps of: forming a tunneling oxide layer on a substrate; and forming a floating gate comprising a plurality of silicon layers which are formed through a repeated cyclical process under temperatures of around 550 degrees C.; wherein the plurality of silicon layers are formed by repeating a process which includes the steps of depositing a silicon layer with a thickness of 100 to 500 Angstroms at temperatures of about 550 degrees C. and then purging using N 2 .
Claim 2
Independent Claim 90 words
A method of fabricating a nonvolatile semiconductor memory device, comprising the steps of: forming a tunneling oxide layer on a substrate; and forming a floating gate comprising a plurality of silicon layers which are formed through a repeated cyclical process under temperatures of around 550 degrees C.; wherein the plurality of silicon layers are formed by repeating a process which includes the steps of depositing a silicon layer with a thickness of 100 to 500 Angstroms at temperatures of about 550 degrees C. and then purging using N 2 .
Claim 3
Dependent Claim 18 words
The method of claim 1, wherein the silicon layers have an overall thickness of 1500 to 2000 Angstroms.
Claim 4
Independent Claim 116 words
A method of fabricating a nonvolatile semiconductor memory device, comprising the steps of: forming a tunneling oxide layer on a substrate; forming a floating gate comprising a plurality of silicon layers which are formed through a repeated cyclical process under temperatures of around 550 degrees C.; forming an interposed insulating layer over the entire surface of the floating gate; and forming a control gate over the entire surface of the interposed insulating layer; wherein the plurality of silicon layers are formed by repeating a process which includes the step of depositing a silicon layer with a thickness of 100 to 500 Angstroms at temperatures of about 550 degrees C. and then purging using N 2 .
Claim 5
Independent Claim 116 words
A method of fabricating a nonvolatile semiconductor memory device, comprising the steps of: forming a tunneling oxide layer on a substrate; forming a floating gate comprising a plurality of silicon layers which are formed through a repeated cyclical process under temperatures of around 550 degrees C.; forming an interposed insulating layer over the entire surface of the floating gate; and forming a control gate over the entire surface of the interposed insulating layer; wherein the plurality of silicon layers are formed by repeating a process which includes the step of depositing a silicon layer with a thickness of 100 to 500 Angstroms at temperatures of about 550 degrees C. and then purging using N 2 .
Claim 6
Dependent Claim 19 words
The method of claim 3, wherein the silicon layers have an overall thickness of about 1500 to 2000 Angstroms.
Claim 7
Dependent Claim 14 words
The method of claim 4, wherein the interposed insulating layer is made of oxide-nitride-oxide.
Claim 8
Dependent Claim 14 words
The method of claim 3, wherein the interposed insulating layer is made of oxide-nitride-oxide.

References Cited (Backward Citations)

US5147813A Cited
US5350698A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-08-28 1999-02-27 1999-08-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-08-28 2003-02-27 2003-08-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-08-28 2007-02-27 2007-08-29 $7700.00 Window Closed / Lapsed

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