Semiconductor device having complimentary bonding pads

Claim 2

A semiconductor chip having a first edge, a second edge substantially perpendicular to said first edge, and a corner where said first edge intersects said second edge, said semiconductor chip being arranged on a die pad and having a plurality of circuit elements formed therein, and said semiconductor chip comprising: a first bonding terminal disposed near said corner and selectively coupled to said circuit elements, said first bonding terminal comprising first and second electrode pads disposed along a first pathway substantially parallel to said first edge, said second electrode pad disposed between said first electrode pad and said second edge and coupled to said first electrode pad; and a second bonding terminal disposed near said corner and selectively coupled to said circuit elements, said second bonding terminal comprising third and fourth electrode pads disposed along a second pathway substantially parallel to said second edge, said second pathway intersecting said first pathway at a point disposed near said corner, said fourth electrode pad being disposed between said third electrode pad and said first edge and coupled to said third electrode pad.

Claim 3

A semiconductor device comprising: (a) a semiconductor chip having a first edge, a second edge substantially perpendicular to said first edge, and a corner where said first edge intersects said second edge, said semiconductor chip being arranged on a die pad and having a plurality of circuit elements formed therein, and said semiconductor chip including: a first bonding terminal disposed near said corner and selectively coupled to said circuit elements, said first bonding terminal comprising first and second electrode pads disposed along a first pathway substantially parallel to said first edge, said second electrode pad disposed between said first electrode pad and said second edge and coupled to said first electrode pad; and a second bonding terminal disposed near said corner and selectively coupled to said circuit elements, said second bonding terminal comprising third and fourth electrode pads disposed along a second pathway substantially parallel to said second edge, said second pathway intersecting said first pathway at a point disposed near said corner, said fourth electrode pad being disposed between said third electrode pad and said first edge and coupled to said third electrode pad; (b) a plurality of frame leads disposed on an external housing package, each lead having a tip and each lead extending from outside said semiconductor chip toward the center of said semiconductor chip with said tip opposing the outer periphery of said semiconductor chip; (c) a plurality of first leads made of a conductive metal for selectively coupling said first electrode pad or said second electrode pad of said first bonding terminal to said frame leads; and (d) a plurality of second leads made of said conductive metal for selectively coupling said third electrode pad or said fourth electrode pad of said second bonding terminal to said frame leads.

Claim 4

A semiconductor device comprising: (a) a semiconductor chip having a first edge, a second edge substantially perpendicular to said first edge, and a corner where said first edge intersects said second edge, said semiconductor chip being arranged on a die pad and having a plurality of circuit elements formed therein, and said semiconductor chip including: a first bonding terminal disposed near said corner and selectively coupled to said circuit elements, said first bonding terminal comprising first and second electrode pads disposed along a first pathway substantially parallel to said first edge, said second electrode pad disposed between said first electrode pad and said second edge and coupled to said first electrode pad; and a second bonding terminal disposed near said corner and selectively coupled to said circuit elements, said second bonding terminal comprising third and fourth electrode pads disposed along a second pathway substantially parallel to said second edge, said second pathway intersecting said first pathway at a point disposed near said corner, said fourth electrode pad being disposed between said third electrode pad and said first edge and coupled to said third electrode pad; (b) a plurality of frame leads disposed on an external housing package, each lead having a tip and each lead extending from outside said semiconductor chip toward the center of said semiconductor chip with said tip opposing the outer periphery of said semiconductor chip; (c) a plurality of first leads made of a conductive metal for selectively coupling said first electrode pad or said second electrode pad of said first bonding terminal to said frame leads; and (d) a plurality of second leads made of said conductive metal for selectively coupling said third electrode pad or said fourth electrode pad of said second bonding terminal to said frame leads.

Claim 5

The semiconductor device of claim 2 wherein said conductive metal is gold.

Claim 6

The semiconductor device of claim 2 wherein: said first and second electrode pads and said third and fourth electrode pads are coupled by conductive paths having a specific length; each of said first, second, third, and fourth electrode pads have a specific diameter; and said specific length of said conductive paths is less than several times said specific diameter of said first, second, third, and fourth electrode pads.

Claim 7

A semiconductor device comprising: a semiconductor chip having a first edge, a second edge substantially perpendicular to said first edge, a corner where said first edge intersects said second edge, and a plurality of circuit elements; a plurality of first electrode pads situated near and substantially parallel to said first edge of said semiconductor chip and selectively coupled to said circuit elements, said plurality of first electrode pads forming a first arrangement of electrode pads along said first edge; a plurality of second electrode pads situated near and substantially parallel to said second edge of said semiconductor chip and selectively coupled to said circuit elements, said plurality of second electrode pads forming a second arrangement of electrode pads along said second edge; a first auxiliary electrode pad disposed near said corner of said semiconductor chip and coupled to one of said plurality of first electrode pads said that is situated at an end of the first arrangement of electrode pads by a thin conductive path; and a second auxiliary electrode pad disposed near said corner of said semiconductor chip, electrically separated from said first auxiliary electrode pad, and coupled to one of said plurality of second electrode pads at an end of the Second arrangement of electrode pads.

Claim 8

A semiconductor device comprising: a semiconductor chip having a first edge, a second edge substantially perpendicular to said first edge, a corner where said first edge intersects said second edge, and a plurality of circuit elements; a plurality of first electrode pads situated near and substantially parallel to said first edge of said semiconductor chip and selectively coupled to said circuit elements, said plurality of first electrode pads forming a first arrangement of electrode pads along said first edge; a plurality of second electrode pads situated near and substantially parallel to said second edge of said semiconductor chip and selectively coupled to said circuit elements, said plurality of second electrode pads forming a second arrangement of electrode pads along said second edge; a first auxiliary electrode pad disposed near said corner of said semiconductor chip and coupled to one of said plurality of first electrode pads said that is situated at an end of the first arrangement of electrode pads by a thin conductive path; and a second auxiliary electrode pad disposed near said corner of said semiconductor chip, electrically separated from said first auxiliary electrode pad, and coupled to one of said plurality of second electrode pads at an end of the Second arrangement of electrode pads.

Claim 9

A semiconductor device according to claim 5 further comprising a lead frame, wherein said lead frame disposed on an external housing package comprises a plurality of leads extending from outside said semiconductor chip toward the center of said semiconductor chip; and the plurality of said leads are made of a conductive metal for coupling the pluralities of said first and second electrode pads to said lead frame.

Claim 10

A semiconductor device according to claim 5 further comprising a lead frame, wherein said lead frame disposed on an external housing package comprises a plurality of leads extending from outside said semiconductor chip toward the center of said semiconductor chip; and the plurality of said leads are made of a conductive metal for coupling the pluralities of said first and second electrode pads and said first and second auxiliary electrode pads to said lead frame.

Claim 11

A semiconductor device according to claim 5 comprising third and fourth auxiliary electrode pads, wherein said third auxiliary pad is situated between a first electrode pad at the end of the first arrangement of electrode pads and another first electrode pad adjacent to said first electrode pad at the end of the first arrangement, and coupled to said another first electrode pad by a conductive path; and said fourth auxiliary electrode pad is situated between a second electrode pad at the end of the second arrangement of electrode pads and another second electrode pad adjacent to said second electrode pad at the end of the second arrangement and coupled to said another second electrode pad by a conductive path.

Claim 12

A semiconductor device according to claim 8 further comprising a lead frame, wherein said lead frame disposed on an external housing package comprises a plurality of leads extending from outside said semiconductor chip toward the center of said semiconductor chip; and the plurality of said leads are made of a conductive metal for coupling the pluralities of said first and second electrode pads to said lead frame.

Claim 13

A semiconductor device according to claim 8 further comprising a lead frame, wherein said lead frame disposed on an external housing package comprises a plurality of leads extending from outside said semiconductor chip toward the center of said semiconductor chip; and the plurality of said leads are made of a conductive metal for coupling the pluralities of said first and second electrode pads and said first, second, third-and fourth auxiliary electrode pads to said lead frame.

Claim 14

A semiconductor device according to claims 6, 7, 9 or 10, wherein said conductive metal is gold.

Claim 15

A semiconductor device according to claim 5, wherein said conductive paths have a specific length; said first and second electrode pads and said first and second auxiliary electrode pads have a specific diameter; and said specific length of said conductive paths is less than several times said specific diameter of said first and second electrode pads and said first and second auxiliary electrode pads.

Claim 16

A semiconductor device according to claim 8, wherein said conductive paths have a specific length; said first and second electrode pads and said first, second, third and fourth auxiliary electrode pads have a specific diameter; and said specific length of said conductive paths is less than several times said specific diameter of said first and second electrode pads and said first, second, third and fourth auxiliary electrode pads.

Claim 17

A semiconductor chip comprising a first edge, a second edge substantially perpendicular to said first edge, a corner where said first edge intersects said second edge, a plurality of circuit elements, and first and second bonding terminals, wherein said first bonding terminal disposed near said corner comprises a first electrode pad and a first auxiliary electrode pad disposed substantially parallel to said first edge; said first auxiliary electrode pad is situated between said first electrode pad and said second edge of said semiconductor chip; said second bonding terminal disposed near said corner comprises a second electrode pad and a second auxiliary electrode pad disposed substantially parallel to said second edge; said second auxiliary electrode pad is situated between said second electrode pad and said first edge of said semiconductor chip.

Claim 18

A semiconductor chip comprising a first edge, a second edge substantially perpendicular to said first edge, a corner where said first edge intersects said second edge, a plurality of circuit elements, and first and second bonding terminals, wherein said first bonding terminal disposed near said corner comprises a first electrode pad and a first auxiliary electrode pad disposed substantially parallel to said first edge; said first auxiliary electrode pad is situated between said first electrode pad and said second edge of said semiconductor chip; said second bonding terminal disposed near said corner comprises a second electrode pad and a second auxiliary electrode pad disposed substantially parallel to said second edge; said second auxiliary electrode pad is situated between said second electrode pad and said first edge of said semiconductor chip.

Claim 19

A semiconductor chip comprising a first edge, a second edge substantially perpendicular to said first edge, a corner where said first edge intersects said second edge, a plurality of circuit elements, and first, second, third and fourth bonding terminals, wherein said first bonding terminal disposed near said corner comprises a first electrode pad and a first auxiliary electrode pad disposed substantially parallel to said first edge; said first auxiliary electrode pad is situated between said first electrode pad and said second edge of said semiconductor chip; said second bonding terminal disposed near said corner comprises a second electrode pad and a second auxiliary electrode pad disposed substantially parallel to said second edge; said second auxiliary electrode pad is situated between said second electrode pad and said first edge of said semiconductor chip; another one of said leads of said lead frame is coupled to either said second electrode pad or said second auxiliary electrode pad when said semiconductor chip is bonded in one of said housing packages; said third bonding terminal disposed near said corner comprises a first electrode pad and a third auxiliary electrode pad disposed substantially parallel to said first edge; said third auxiliary electrode pad is situated between said first bonding terminal and said first electrode pad; another one of said leads of said lead frame is coupled to either said first electrode pad or said third auxiliary electrode pad when said semiconductor chip is bonded in one of said-housing packages; said fourth bonding terminal disposed near said corner comprises a second electrode pad and a fourth auxiliary electrode pad disposed substantially parallel to said second edge; said fourth auxiliary electrode pad is situated between said second bonding terminal and said second electrode pad.

Claim 20

A semiconductor chip comprising a first edge, a second edge substantially perpendicular to said first edge, a corner where said first edge intersects said second edge, a plurality of circuit elements, and first, second, third and fourth bonding terminals, wherein said first bonding terminal disposed near said corner comprises a first electrode pad and a first auxiliary electrode pad disposed substantially parallel to said first edge; said first auxiliary electrode pad is situated between said first electrode pad and said second edge of said semiconductor chip; said second bonding terminal disposed near said corner comprises a second electrode pad and a second auxiliary electrode pad disposed substantially parallel to said second edge; said second auxiliary electrode pad is situated between said second electrode pad and said first edge of said semiconductor chip; another one of said leads of said lead frame is coupled to either said second electrode pad or said second auxiliary electrode pad when said semiconductor chip is bonded in one of said housing packages; said third bonding terminal disposed near said corner comprises a first electrode pad and a third auxiliary electrode pad disposed substantially parallel to said first edge; said third auxiliary electrode pad is situated between said first bonding terminal and said first electrode pad; another one of said leads of said lead frame is coupled to either said first electrode pad or said third auxiliary electrode pad when said semiconductor chip is bonded in one of said-housing packages; said fourth bonding terminal disposed near said corner comprises a second electrode pad and a fourth auxiliary electrode pad disposed substantially parallel to said second edge; said fourth auxiliary electrode pad is situated between said second bonding terminal and said second electrode pad.