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US5475606A Expired / Lapsed US ⏱️ 0.0 years remaining

Faraday cage for a printed circuit card

Assignee: GlobalFoundries Inc
•
Filing: 1993-03-05
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Granted: 1995-12-12
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Expires: 2013-03-05
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Abstract

Abstract In a printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers, a Faraday cage is constructed including a first and a second ground plane disposed in a first and second conductor layer respectively. The ground planes being electrically interconnected at their peripheries, preferably by a plurality of vias. A third conductor layer is disposed between the first and second conductor layers in which a plurality of signal paths are defined. The Faraday cage surrounds a shielded portion of the third conductor layer so that electrical signals conducted through the shielded portion are isolated from electrical noise. The invention finds particular application in a mixed digital/analog board separated into a digital section of the board having a digital ground plane defined in one of the conductor layers and a plurality of digital signal paths defined in another of the conductor layers and an analog section of the board having the Faraday cage and the shielded portion. Thus, the plurality of signal paths in the shielded region are intended for analog signals which are sensitive to digital noise. Additional conductor layers in the analog section can be added inside and outside the Faraday cage. Those analog signal paths located outside the cage are defined for analog signals which are less sensitive than analog signals in the shielded region. The board may be an audio card for a digital computer.

Inventors

  • 👤 Jorge E. Muyshondt
  • 👤 Gary A. Parker
  • 👤 Bruce J. Wilkie

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 22:13
CPC Classifications
H; H05; H05K; H05K9/00; H05K9/0007; H05K9/002; H05K9/0039; H05K1/00; H05K1/02; H05K1/0213; H05K1/0216; H05K1/0218; H05K2201/00; H05K2201/07; H05K2201/0707; H05K2201/0715; H05K2201/09; H05K2201/09209; H05K2201/0929; H05K2201/093

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 150 words
A printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers comprising: a first and a second ground plane disposed in a first and second conductor layer respectively, the ground planes being electrically interconnected at selected peripheral regions forming a Faraday cage, wherein the Faraday cage is formed entirely within the printed circuit board; a third conductor layer disposed between the first and second ground planes in which a plurality of signal paths are defined and are substantially surrounded by the Faraday cage a digital section of the board having a digital ground plane defined in one of the conductor layers and a plurality of digital signal paths defined in another of the conductor layers; and and analog section of the board having the Faraday cage so that the plurality of signal paths in the Faraday cage are intended for analog signals.
Claim 2
Dependent Claim 150 words
A printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers comprising: a first and a second ground plane disposed in a first and second conductor layer respectively, the ground planes being electrically interconnected at selected peripheral regions forming a Faraday cage, wherein the Faraday cage is formed entirely within the printed circuit board; a third conductor layer disposed between the first and second ground planes in which a plurality of signal paths are defined and are substantially surrounded by the Faraday cage a digital section of the board having a digital ground plane defined in one of the conductor layers and a plurality of digital signal paths defined in another of the conductor layers; and and analog section of the board having the Faraday cage so that the plurality of signal paths in the Faraday cage are intended for analog signals.
Claim 3
Dependent Claim 39 words
The board as recited in claim 1 which further comprises: digital devices electrically connected to one surface of the digital section of the board; and analog devices electrically connected to one surface of the analog section of the board.
Claim 4
Dependent Claim 45 words
The board as recited in claim 1 which further comprises a fourth conductor layer in the analog section and outside the Faraday cage in which analog signal paths are defined intended for analog signals which are less sensitive than analog signals in the Faraday cage.
Claim 5
Dependent Claim 38 words
The board as recited in claim 1 wherein the board functions as an audio card for a digital computer so that digital commands from the computer are converted to analog signals for a speaker coupled to the board.
Claim 6
Dependent Claim 60 words
The board as recited in claim 4 wherein the digital section includes a bidirectional buffer which receives commands from a system bus of the computer and a digital signal processor which processes the commands into digital signals and the analog section includes a digital to analog converter which converts the digital signals from the digital signal processor into analog signals.
Claim 7
Dependent Claim 22 words
The board as recited in claim 1 wherein the ground planes are interconnected at selected peripheral regions by a plurality of vias.
Claim 8
Independent Claim 140 words
A method for operating a printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers, comprising the steps of: grounding a digital ground plane located in a digital section of the board, the digital section being distinct from an analog section of the board, the analog section containing the Faraday cage; transmitting digital signals through a plurality of signal paths in the digital section one of the conductor layers of the board; grounding a Faraday cage including a first and a second ground plane disposed in a first and second conductor layer respectively, the ground planes being electrically interconnected at selected peripheral regions by a plurality of vias; and transmitting analog electrical signals through a third conductor layer disposed between the first and second ground planes, substantially surrounded by the Faraday cage.
Claim 9
Independent Claim 140 words
A method for operating a printed circuit board having a plural number of conductor layers separated by a plural number of insulator layers, comprising the steps of: grounding a digital ground plane located in a digital section of the board, the digital section being distinct from an analog section of the board, the analog section containing the Faraday cage; transmitting digital signals through a plurality of signal paths in the digital section one of the conductor layers of the board; grounding a Faraday cage including a first and a second ground plane disposed in a first and second conductor layer respectively, the ground planes being electrically interconnected at selected peripheral regions by a plurality of vias; and transmitting analog electrical signals through a third conductor layer disposed between the first and second ground planes, substantially surrounded by the Faraday cage.

References Cited (Backward Citations)

US3848174A Cited
US4019141A Cited
US4563575A Cited
US5006788A Cited
US4937729A Cited
US5033032A Cited
US5023753A Cited
US4942400A Cited
US5079845A Cited
US5262594A Cited
US5165055A Cited
US5278720A Cited
US5247735A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-12-11 1999-06-12 1999-12-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-12-11 2003-06-12 2003-12-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-12-11 2007-06-12 2007-12-12 $7700.00 Window Closed / Lapsed

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