Manufacture of electronic devices comprising thin-film transistors using an ion implantation mask having bevelled edges

Claim 1

A method of manufacturing an electronic device comprising thin-film transistors formed on a substrate by steps which include: (a) depositing a disordered material on the substrate to provide a semiconductor film in which channel regions of the transistors are to be accommodated, charge-trapping states being present in the semiconductor film, (b) providing a masking pattern on the semiconductor film to mask areas where the thin-film transistors are to be formed, (c) etching away the unmasked areas of the film from the substrate to leave semiconductor film bodies for the transistors, and (d) providing the semiconductor film bodies with electrodes forming a source, a drain and an insulated gate of each transistor, the transistor current flow through the channel region between the source and drain being by charge carriers of a first conductivity type under the control of the insulated gate in operation of the transistor, which method is characterised in that the masking pattern is provided with bevelled edge portions which are present when an implantation step (e) is carried out to implant ions of a second conductivity type dopant into the semiconductor film material, the thickness of the masking pattern in step (c) being sufficiently large as to mask the underlying semiconductor film against implantation of the ions except below the bevelled edge portions where the ions are implanted through the bevelled edge portions to form a dopant stripe across the thickness of the semiconductor film material, which dopant stripe is at least partly retained in the thin-film transistors as a dopant edge to the channel regions for reducing leakage currents along the edges of the channel region in operation of the transistors.

Claim 2

A method of manufacturing an electronic device comprising thin-film transistors formed on a substrate by steps which include: (a) depositing a disordered material on the substrate to provide a semiconductor film in which channel regions of the transistors are to be accommodated, charge-trapping states being present in the semiconductor film, (b) providing a masking pattern on the semiconductor film to mask areas where the thin-film transistors are to be formed, (c) etching away the unmasked areas of the film from the substrate to leave semiconductor film bodies for the transistors, and (d) providing the semiconductor film bodies with electrodes forming a source, a drain and an insulated gate of each transistor, the transistor current flow through the channel region between the source and drain being by charge carriers of a first conductivity type under the control of the insulated gate in operation of the transistor, which method is characterised in that the masking pattern is provided with bevelled edge portions which are present when an implantation step (e) is carried out to implant ions of a second conductivity type dopant into the semiconductor film material, the thickness of the masking pattern in step (c) being sufficiently large as to mask the underlying semiconductor film against implantation of the ions except below the bevelled edge portions where the ions are implanted through the bevelled edge portions to form a dopant stripe across the thickness of the semiconductor film material, which dopant stripe is at least partly retained in the thin-film transistors as a dopant edge to the channel regions for reducing leakage currents along the edges of the channel region in operation of the transistors.