US5502826A
Expired / Lapsed
US
⏱️ 0.0 years remaining
System and method for obtaining parallel existing instructions in a particular data processing configuration by compounding instructions
Assignee: International Business Machines Corp
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Filing: 1994-01-25
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Granted: 1996-03-26
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Expires: 2014-01-25
Abstract
Abstract Scalable compound instruction set machine and method which provides for processing a set of instructions or program to be executed by a computer to determine statically which instructions may be combined into compound instructions which are executed in parallel by a scalar machine. Such processing looks for classes of instructions that can be executed in parallel without data-dependent or hardware-dependent interlocks. Without regard to their original sequence the individual instructions are combined with one or more other individual instructions to form a compound instruction which eliminates interlocks. Control information is appended to identify information relevant to the execution of the compound instructions. The result is a stream of scalar instructions compounded or grouped together before instruction decode time so that they are already flagged and identified for selective simultaneous parallel execution by execution units. The compounding does not change the object code results and existing programs realize performance improvements while maintaining compatibility with previously implemented systems for which the original set of instructions was provided.
Inventors
- 👤 Stamatis Vassiliadis
- 👤 Bartholomew Blaner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 07:52
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3818; G06F9/382; G06F9/3017; G06F9/3802; G06F9/3808; G06F9/3836; G06F9/3842; G06F9/3853; G06F9/3885
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
186 words
A computer implemented method for processing a sequence of binary encoded scalar instructions, each instruction including an operation code, prior to fetching for execution in a data processing system, which places constraints on parallel instruction execution, including the steps of: transferring said sequence of binary encoded scalar instructions from a data storage unit to an instruction compounding unit; assigning each operation code in said sequence of instructions to one of a plurality categories based on a function performed by said data processing system in response to said operation code, the number of said categories being less than the number of operation codes in said sequence of instructions; storing in said data processing system matrix data that encodes which instruction pairs in said sequence of instructions are compoundable based on the category assigned to the operation code of each adjacent instruction of said instruction pairs; processing groups of instructions in said compounding unit to generate a compounding instruction for instruction pairs by comparing to said matrix data the category assigned in said assigning step respectively to each instruction of the instruction pairs in said group of instructions.
Claim 2
Dependent Claim
186 words
A computer implemented method for processing a sequence of binary encoded scalar instructions, each instruction including an operation code, prior to fetching for execution in a data processing system, which places constraints on parallel instruction execution, including the steps of: transferring said sequence of binary encoded scalar instructions from a data storage unit to an instruction compounding unit; assigning each operation code in said sequence of instructions to one of a plurality categories based on a function performed by said data processing system in response to said operation code, the number of said categories being less than the number of operation codes in said sequence of instructions; storing in said data processing system matrix data that encodes which instruction pairs in said sequence of instructions are compoundable based on the category assigned to the operation code of each adjacent instruction of said instruction pairs; processing groups of instructions in said compounding unit to generate a compounding instruction for instruction pairs by comparing to said matrix data the category assigned in said assigning step respectively to each instruction of the instruction pairs in said group of instructions.
Claim 3
Dependent Claim
22 words
The method of claim 1 wherein said processing step is performed prior to the time the existing instructions are fetched for execution.
Claim 4
Dependent Claim
58 words
The method of claim 1 wherein said processing step retains the object code of the existing instructions in its original form for execution singly or for execution in parallel with another instruction when a fetched instruction has a compounding indicator that its associated instruction can be executed in parallel with an adjacent intruction of a fetched instruction stream.
Claim 5
Dependent Claim
37 words
The method of claim 1 wherein said processing step takes into account data dependent interlocks between instructions as well as the existence of related interlock collapsing functional units in the particular configuration of the data processing system.
Claim 6
Dependent Claim
37 words
The method of claim 1 wherein said processing step takes into account hardware dependent interlocks between instructions as well as the existence of related interlock collapsing functional units in the particular configuration of a data processing system.
Claim 7
Dependent Claim
55 words
The method of claim 1 wherein said processing step compares a first existing instruction with a second adjacent following instruction for possible compounding with each other, and then compares the second instruction with a third adjacent following intruction for possible compounding with each other, to identify multiple compound instructions identified by multiple compounding indicators, respectively.
Claim 8
Dependent Claim
27 words
The method of claim 6 further including the additional step of determining an optimum sequence of multiple compound instructions for a given portion of an instruction stream.
Claim 9
Dependent Claim
90 words
The computer implemented method as in claim 1 wherein said compounding instruction is associated with each instruction of the instruction stream which can be grouped as adjacent instructions which can be executed in parallel in a particular configuration of a data processing system has a value n which indicates the number of instructions following the instruction in the instruction stream which can be compounded with the instruction upon execution of the instruction when the original instruction is fetched with the associated compounding indicator for execution in a particular computer configuration.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-03-26 | 1999-09-25 | 2000-03-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-03-26 | 2003-09-25 | 2004-03-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-03-26 | 2007-09-25 | 2008-03-26 | $7700.00 | Window Closed / Lapsed |