US5508748A
Expired / Lapsed
US
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Data level selection for multilevel VSB transmission system
Assignee: LG Electronics Inc
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Filing: 1994-04-08
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Granted: 1996-04-16
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Expires: 2014-04-08
Abstract
Abstract A system for determining the data bits represented by the received symbols of one or more data constellations includes converting the received symbols into multi-bit values (preferably in two's complement form), selecting a number of the most significant bits of each of the multi-bit values and inverting the most significant bit thereof to derive the data bits represented by the respective symbol.
Inventors
- 👤 Gopalan Krishnamurthy
- 👤 Timothy G. Laud
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 22:54
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/004; H04L1/0056; H04L1/0071; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H03; H03M; H03M5/00; H03M5/02; H03M5/20; H04L1/0001; H04L1/0002; H04L1/0003; H04L1/0033; H04L1/0041; H04L1/0043; H04L1/0045; H04L1/0052; H04L25/4917; H04L25/4919; H04L27/00; H04L27/02; H04N; H04N21/00; H04N21/40; H04N21/41; H04N21/426; H04L1/0057
Claims Analysis
Total Claims: 31
Claim 1
Independent Claim
73 words
A digital data processor comprising: means for developing an information signal comprising a plurality of regularly spaced multilevel symbols, each of said symbols representing a predetermined number of data bits; means converting each of said symbols into a corresponding multi-bit value; and means for selecting a number of the most significant bits of each of said multi-bit values corresponding to said predetermined number for providing the data bits represented by the respective symbol.
Claim 2
Dependent Claim
73 words
A digital data processor comprising: means for developing an information signal comprising a plurality of regularly spaced multilevel symbols, each of said symbols representing a predetermined number of data bits; means converting each of said symbols into a corresponding multi-bit value; and means for selecting a number of the most significant bits of each of said multi-bit values corresponding to said predetermined number for providing the data bits represented by the respective symbol.
Claim 3
Dependent Claim
37 words
The data processor of claim 1 wherein said means for selecting comprises means for inverting the most significant bit of each of said selected number of bits for providing the data bits represented by the respective symbol.
Claim 4
Dependent Claim
14 words
The data processor of claim 1 wherein said predetermined number comprises a variable integer.
Claim 5
Dependent Claim
22 words
The data processor of claim 3 wherein said predetermined number comprises at least one of the integers 4, 3, 2 or 1.
Claim 6
Dependent Claim
15 words
The data processor of claim 2 wherein said multi-bit values comprises at least 9-bit values.
Claim 7
Dependent Claim
99 words
A digital data processor comprising: means for developing an information signal comprising a plurality of regularly spaced multilevel symbols, each of said symbols representing at least one of the integers 4, 3, 2 or 1 data bits; means for converting each of said symbols into a corresponding multi-bit value; and means for selecting a number of the most significant bits of each of said multi-bit values equal to the associated one of said integers and for inverting the most significant bit of each of said selected number of bits for providing the data bits represented by the respective symbol.
Claim 8
Dependent Claim
99 words
A digital data processor comprising: means for developing an information signal comprising a plurality of regularly spaced multilevel symbols, each of said symbols representing at least one of the integers 4, 3, 2 or 1 data bits; means for converting each of said symbols into a corresponding multi-bit value; and means for selecting a number of the most significant bits of each of said multi-bit values equal to the associated one of said integers and for inverting the most significant bit of each of said selected number of bits for providing the data bits represented by the respective symbol.
Claim 9
Dependent Claim
15 words
The data processor of claim 6 wherein said multi-bit values comprises at least 9-bit values.
Claim 10
Independent Claim
89 words
A method of converting a multi-bit data signal into a plurality of transmission symbols comprising: defining a family of data constellations each having a different packing density within a given range of values and wherein slice points and data levels of each of said data constellations are coincident with selected slice points of the next more densely packed one of said data constellations; providing a multi-bit data signal; and using a selected one of said data constellations for converting said multi-bit data signal into said plurality of transmission symbols.
Claim 11
Independent Claim
89 words
A method of converting a multi-bit data signal into a plurality of transmission symbols comprising: defining a family of data constellations each having a different packing density within a given range of values and wherein slice points and data levels of each of said data constellations are coincident with selected slice points of the next more densely packed one of said data constellations; providing a multi-bit data signal; and using a selected one of said data constellations for converting said multi-bit data signal into said plurality of transmission symbols.
Claim 12
Dependent Claim
49 words
The method of claim 8, further comprising: converting each of said transmission symbols to a corresponding multi-bit value; and selecting a number of the most significant bits of each of said multi-bit values corresponding to said selected data constellation to provide the data bits represented by the respective symbol.
Claim 13
Dependent Claim
34 words
The method of claim 9 wherein said multi-bit values are expressed in two's complement form, and inverting the most significant bit of each of said selected number of bits to obtain said data bits.
Claim 14
Dependent Claim
18 words
The method of claim 8 wherein each of said data constellations corresponds to a multilevel VSB data constellation.
Claim 15
Dependent Claim
23 words
The method of claim 11 wherein said multilevel VSB data constellations comprise at least 16, 8, 4 and 2 level VSB data constellations.
Claim 16
Independent Claim
124 words
A method of converting a multi-bit data signal into a plurality of transmission symbols comprising: defining a family of data constellations each having a different packing density within a given range of values and wherein slice points and data levels of each of said data constellations are coincident with selected slice points of the next more densely packed one of said data constellations; providing a multi-bit data signal; using a selected one of said data constellations to form said plurality of transmission symbols; converting each of said symbols into a corresponding multi-bit value; and selecting a number of the most significant bits of each of said multi-bit values corresponding to said selected data constellation to provide the data bits represented by the respective symbol.
Claim 17
Independent Claim
124 words
A method of converting a multi-bit data signal into a plurality of transmission symbols comprising: defining a family of data constellations each having a different packing density within a given range of values and wherein slice points and data levels of each of said data constellations are coincident with selected slice points of the next more densely packed one of said data constellations; providing a multi-bit data signal; using a selected one of said data constellations to form said plurality of transmission symbols; converting each of said symbols into a corresponding multi-bit value; and selecting a number of the most significant bits of each of said multi-bit values corresponding to said selected data constellation to provide the data bits represented by the respective symbol.
Claim 18
Dependent Claim
29 words
The method of claim 13 wherein said multi-bit values are expressed in two's complement form and inverting the most significant bit of each of said selected number of bits.
Claim 19
Dependent Claim
18 words
The method of claim 14 wherein each of said data constellations correponds to a multilevel VSB data constellation.
Claim 20
Dependent Claim
23 words
The method of claim 15 wherein said multilevel VSB data constellations comprise at least 16, 8, 4 and 2 level VSB data constellations.
Claim 21
Dependent Claim
75 words
A digital data processor comprising: means for developing an information signal comprising a plurality of regularly spaced multilevel symbols, each of said symbols representing a predetermined number of data bits; means for converting each of said symbols into a corresponding multi-bit value; means for selecting a number of the least significant bits of each of said multi-bit values for generating an error signal; and means responsive to said error signal for processing said multi-bit values.
Claim 22
Dependent Claim
75 words
A digital data processor comprising: means for developing an information signal comprising a plurality of regularly spaced multilevel symbols, each of said symbols representing a predetermined number of data bits; means for converting each of said symbols into a corresponding multi-bit value; means for selecting a number of the least significant bits of each of said multi-bit values for generating an error signal; and means responsive to said error signal for processing said multi-bit values.
Claim 23
Dependent Claim
33 words
The data processor of claim 17 wherein said predetermined number comprises an integer N and wherein said selected number of least significant bits comprises a number inversely related to the value of N.
Claim 24
Dependent Claim
23 words
The data processor of claim 18 wherein said selecting means comprises means for limiting said error signal to a given number of bits.
Claim 25
Dependent Claim
35 words
The data processor of claim 18 wherein N comprises one of the integers 4, 3, 2 or 1 and wherein the corresponding selected numbers of least significant bits respectively comprise 5, 6, 7 and 8.
Claim 26
Dependent Claim
154 words
A digital data processor comprising: means for developing an in-phase component I of an information signal in the form of a plurality of regularly spaced multilevel symbols each representing a predetermined number of data bits; means for converting each of said symbols into a corresponding multi-bit value; a data processor responsive to said multi-bit values for generating an in-phase output signal comprising a plurality of multi-bit values and a related quadrature output signal comprising a plurality of multi-bit values; first means for selecting a number of the least significant bits of each of said multi-bit values of said in-phase output signal for generating an error signal; and second means for selecting a fixed number of the most significant bits of each of said multi-bit values of said quadrature output signal for generating a quantizing signal; said data processor being responsive to said error and quantizing signals for generating said in-phase and quadrature output signals.
Claim 27
Dependent Claim
154 words
A digital data processor comprising: means for developing an in-phase component I of an information signal in the form of a plurality of regularly spaced multilevel symbols each representing a predetermined number of data bits; means for converting each of said symbols into a corresponding multi-bit value; a data processor responsive to said multi-bit values for generating an in-phase output signal comprising a plurality of multi-bit values and a related quadrature output signal comprising a plurality of multi-bit values; first means for selecting a number of the least significant bits of each of said multi-bit values of said in-phase output signal for generating an error signal; and second means for selecting a fixed number of the most significant bits of each of said multi-bit values of said quadrature output signal for generating a quantizing signal; said data processor being responsive to said error and quantizing signals for generating said in-phase and quadrature output signals.
Claim 28
Dependent Claim
33 words
The data processor of claim 21 wherein said predetermined number comprises an integer N and wherein said selected number of least significant bits comprises a number inversely related to the value of N.
Claim 29
Dependent Claim
24 words
The data processor of claim 22 wherein said first selecting means comprises means for limiting said error signal to a given number of bits.
Claim 30
Dependent Claim
35 words
The data processor of claim 22 wherein N comprises one of the integers 4, 3, 2 or 1 and wherein the corresponding selected numbers of least significant bits respectively comprise 5, 6 7 and 8.
Claim 31
Dependent Claim
16 words
The data processor of claim 24 wherein said fixed number of most significant bits comprises 4.
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JPH0372722A
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EP0485108A2
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US5087975A
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WO1992017971A1
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EP0584865A1
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US5410368A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-04-16 | 1999-10-16 | 2000-04-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-04-16 | 2003-10-16 | 2004-04-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-04-16 | 2007-10-16 | 2008-04-16 | $7700.00 | Window Closed / Lapsed |