US5517047A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Bonded wafer processing
Assignee: Intersil Corp
•
Filing: 1994-08-09
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Granted: 1996-05-14
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Expires: 2014-08-09
Abstract
Abstract Low temperature wafer bonding using a silicon-oxidizing bonding liquid permits introduction of radiation hardening dopants and electrically active dopants as constituents of the bonding liquid. Oxidizers such as nitric acid may be used in the bonding liquid. Dielectric layers on the device wafer and the handle wafer may be used when additional silicon is provided for the oxidative bonding. Integrated circuits fabricated from such bonded wafers may have buried layers and radiation hardening with device silicon too thick for implantation.
Inventors
- 👤 Jack H. Linn
- 👤 Robert K. Lowry
- 👤 George V. Rouse
- 👤 James F. Buller
- 👤 William H. Speece
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 01:00
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/80; H10D86/85; H10P; H10P30/00; H10P30/20; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W; H10W10/00; H10W10/01; H10W10/061; H10W10/10; H10W10/181; H10P90/1914; H10W10/011; H10W10/014; H10W10/041; H10W10/17; H10W10/40; Y; Y10; Y10S; Y10S148/00; Y10S148/012; Y10S438/00; Y10S438/914; Y10S438/92
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
63 words
A bonded wafer integrated circuit, comprising: (a) a handle die having a dielectric layer; (b) a device silicon layer substantially free of nitrogen; (c) means for bonding the device silicon layer to the dielectric layer of said handle die, said means for bonding having a layer of silicon oxynitride; and (d) interconnected transistors in and at a surface of said device silicon layer.
Claim 2
Dependent Claim
63 words
A bonded wafer integrated circuit, comprising: (a) a handle die having a dielectric layer; (b) a device silicon layer substantially free of nitrogen; (c) means for bonding the device silicon layer to the dielectric layer of said handle die, said means for bonding having a layer of silicon oxynitride; and (d) interconnected transistors in and at a surface of said device silicon layer.
Claim 3
Dependent Claim
21 words
The integrated circuit of claim 1, wherein: (a) said device silicon layer includes doped buried layers abutting said silicon oxynitride layer.
Claim 4
Dependent Claim
21 words
The integrated circuit of claim 1, wherein: (a) said handle die is silicon; and (b) said dielectric layer is silicon oxide.
Claim 5
Dependent Claim
16 words
The integrated circuit of claim 1 wherein the means for bonding is about 500-800 Angstroms thick.
Claim 6
Dependent Claim
29 words
The bonded integrated circuit of claim 1 wherein the device layer has a SIMS profile indicating less than 10,000 counts per second of nitrogen ions in said device layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-05-14 | 1999-11-13 | 2000-05-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-05-14 | 2003-11-13 | 2004-05-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-05-14 | 2007-11-13 | 2008-05-14 | $7700.00 | Window Closed / Lapsed |