US5563545A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low cost monolithic GaAs upconverter chip
Assignee: Skyworks Solutions Inc
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Filing: 1994-09-27
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Granted: 1996-10-08
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Expires: 2014-09-27
Abstract
Abstract A monolithic upconverter integrated circuit is described which performs the first frequency conversion of a dual conversion cable television (CATV) receiver. The upconverter chip includes three functional blocks: a Gilbert type image-rejecting mixer, a phase splitter, and a voltage-controlled oscillator. Mixing is performed by a novel Gilbert type mixer including image-rejection inductors to improve the noise figure of the mixer. A differential circuit topology allows the monolithic upconverter chip to utilize a plastic dual inline batwing package without considerable performance loss. On-chip RF bypass networks, in the form of series RC terminations, also help compensate for the undesirable effects of pin inductances in the dual inline package. A resistor-based DC biasing scheme dramatically reduces power-up latency, allowing faster testing.
Inventors
- 👤 Norman R. Scheinberg
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 21:52
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/45179; H03F3/45197; H03D; H03D7/00; H03D7/12; H03D7/125; H03D7/14; H03D7/1408; H03D7/1425; H03D7/1441; H03D7/1458; H03D7/1483; H03D7/1491; H03D9/00; H03D9/06; H03D9/0658; H03D9/0675; H03D2200/00; H03D2200/0001; H03D2200/0019; H03D2200/0025; H03D2200/0027; H03D2200/0041; H03D2200/0043; H03D2200/0084; H03D7/18; H03F2203/00; H03F2203/45; H03F2203/45228; H03F2203/45256; H03F2203/45258; H03F2203/45458; H03F2203/45464; H03F2203/45466
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
81 words
An electronically variable resistance circuit including a FET having source, drain and gate terminals, said variable resistance circuit providing an electronically controllable resistance between said source and drain terminals, said variable resistance circuit further comprising: a resistance control terminal; resistance means coupled between said resistance control terminal and said gate terminal of the FET; first capacitive means connected between said gate and drain terminals of the FET; and second capacitive means connected between said gate and source terminals of the FET.
Claim 2
Dependent Claim
81 words
An electronically variable resistance circuit including a FET having source, drain and gate terminals, said variable resistance circuit providing an electronically controllable resistance between said source and drain terminals, said variable resistance circuit further comprising: a resistance control terminal; resistance means coupled between said resistance control terminal and said gate terminal of the FET; first capacitive means connected between said gate and drain terminals of the FET; and second capacitive means connected between said gate and source terminals of the FET.
Claim 3
Dependent Claim
81 words
An electronically variable resistance circuit including a FET having source, drain and gate terminals, said variable resistance circuit providing an electronically controllable resistance between said source and drain terminals, said variable resistance circuit further comprising: a resistance control terminal; a resistor connected between said resistance control terminal and the gate terminal of the FET; a first capacitor connected between the gate and drain terminals of the FET; and a second capacitor connected between the gate and source terminals of the FET.
Claim 4
Dependent Claim
81 words
An electronically variable resistance circuit including a FET having source, drain and gate terminals, said variable resistance circuit providing an electronically controllable resistance between said source and drain terminals, said variable resistance circuit further comprising: a resistance control terminal; a resistor connected between said resistance control terminal and the gate terminal of the FET; a first capacitor connected between the gate and drain terminals of the FET; and a second capacitor connected between the gate and source terminals of the FET.
Claim 5
Dependent Claim
22 words
An electronically variable resistance circuit according to claim 2, wherein said electronically variable resistance circuit is implemented in a GaAs integrated circuit.
Claim 6
Dependent Claim
20 words
An electronically variable resistance circuit according to claim 2, wherein said first capacitor and said second capacitor have matched capacitances.
Claim 7
Dependent Claim
41 words
An electronically variable resistance circuit according to claim 2, wherein the circuit has an operating frequency, and wherein the impedance of said first capacitor and said second capacitor at said operating frequency is much less than the impedance of said resistor.
Claim 8
Dependent Claim
34 words
An electronically variable resistance circuit according to claim 5, wherein the impedance of said first capacitor and said second capacitor at said operating frequency is significantly larger than the drain-to-source resistance of the FET.
Claim 9
Dependent Claim
15 words
An electronically variable resistance circuit according to claim 5, wherein said operating frequency is RF.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-10-08 | 2000-04-08 | 2000-10-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-10-08 | 2004-04-08 | 2004-10-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-10-08 | 2008-04-08 | 2008-10-08 | $7700.00 | Window Closed / Lapsed |