US5574655A
Expired / Lapsed
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Method of allocating logic using general function components
Assignee: Xilinx Inc
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Filing: 1995-05-15
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Granted: 1996-11-12
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Expires: 2015-05-15
Abstract
Abstract A method is described for configuring a general symbol to represent a specific symbol indicated by a user. The specific symbols are part of a library. A general symbol for which optimized implementations have been determined and stored is configured to implement the specific function specified by a user. Implementations provided for the general symbol include special functions which provide both high speed and small chip area.
Inventors
- 👤 Steven K. Knapp
- 👤 Jorge P. Seidel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 16:18
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/34
Claims Analysis
Total Claims: 41
Claim 1
Independent Claim
60 words
A computer-aided method for implementing functions of a logic design comprising the steps of: storing a general function component which includes a general arithmetic component and a general register component; and configuring said general function component to implement a specific function component selected by a user, wherein said specific function component provides either an arithmetic function or a register function.
Claim 2
Dependent Claim
60 words
A computer-aided method for implementing functions of a logic design comprising the steps of: storing a general function component which includes a general arithmetic component and a general register component; and configuring said general function component to implement a specific function component selected by a user, wherein said specific function component provides either an arithmetic function or a register function.
Claim 3
Dependent Claim
13 words
The method of claim 1 wherein said specific function component includes an adder.
Claim 4
Dependent Claim
13 words
The method of claim 1 wherein said specific function component includes a comparator.
Claim 5
Dependent Claim
14 words
The method of claim 1 wherein said specific function component includes a shift register.
Claim 6
Dependent Claim
13 words
The method of claim 1 wherein said specific function component includes an accumulator.
Claim 7
Dependent Claim
13 words
The method of claim 1 wherein said specific function component includes a counter.
Claim 8
Dependent Claim
14 words
The method of claim 1 wherein said specific function component includes a data register.
Claim 9
Dependent Claim
14 words
The method of claim 7 wherein said data register includes an asynchronous control means.
Claim 10
Dependent Claim
14 words
The method of claim 7 wherein said data register includes a synchronous control means.
Claim 11
Dependent Claim
14 words
The method of claim 4 wherein said data register includes an asynchronous control means.
Claim 12
Dependent Claim
14 words
The method of claim 4 wherein said data register includes a synchronous control means.
Claim 13
Dependent Claim
27 words
The method of claim 1 wherein said general function component is a general arithmetic function component and said plurality of specific function components includes a tri-state buffer.
Claim 14
Dependent Claim
16 words
The method of claim 1 further including the step of providing data type and precision information.
Claim 15
Dependent Claim
25 words
The method of claim 13 wherein said step of providing includes propagating said data type and precision information to another part of said logic design.
Claim 16
Independent Claim
32 words
A method of allocating design features to appropriate chip resources comprising the steps of: identifying a specific component as an arithmetic component; and mapping said specific component to a general arithmetic component.
Claim 17
Independent Claim
32 words
A method of allocating design features to appropriate chip resources comprising the steps of: identifying a specific component as an arithmetic component; and mapping said specific component to a general arithmetic component.
Claim 18
Dependent Claim
22 words
The method of claim 15 further including the step of allocating clock signals to primary buffers as part of said chip resources.
Claim 19
Dependent Claim
22 words
The method of claim 15 further including the step of allocating clock signals to secondary buffers as part of said chip resources.
Claim 20
Dependent Claim
24 words
The method of claim 15 further including the step of allocating clock signals to primary and secondary buffers as part of said chip resources.
Claim 21
Dependent Claim
13 words
The method of claim 15 further including the step of removing redundant buses.
Claim 22
Dependent Claim
19 words
The method of claim 15 further including the step of removing predetermined secondary buffer signals assigned by a user.
Claim 23
Dependent Claim
20 words
The method of claim 15 further including the step of splitting candidate signals into their clock and logic connection components.
Claim 24
Dependent Claim
23 words
The method of claim 15 further including the step of allocating high fan-out signals to primary buffers as part of said chip resources.
Claim 25
Dependent Claim
24 words
The method of claim 15 further including the step of allocating high fan-out, non-clock signals to secondary buffers as part of said chip resources.
Claim 26
Dependent Claim
25 words
The method of claim 15 further including the step of allocating high fan-out signals to primary and secondary buffers as part of said chip resources.
Claim 27
Dependent Claim
18 words
The method of claim 15 further including the step of allocating set signals or reset signals to buffers.
Claim 28
Dependent Claim
23 words
The method of claim 15 further including the step of allocating registers to input blocks or output blocks after said step of mapping.
Claim 29
Independent Claim
32 words
A method of allocating design features to appropriate chip resources comprising the steps of: identifying a specific component as a register-type component; and mapping said specific component to a general register component.
Claim 30
Independent Claim
32 words
A method of allocating design features to appropriate chip resources comprising the steps of: identifying a specific component as a register-type component; and mapping said specific component to a general register component.
Claim 31
Dependent Claim
22 words
The method of claim 27 further including the step of allocating clock signals to primary buffers as part of said chip resources.
Claim 32
Dependent Claim
22 words
The method of claim 27 further including the step of allocating clock signals to secondary buffers as part of said chip resources.
Claim 33
Dependent Claim
24 words
The method of claim 27 further including the step of allocating clock signals to primary and secondary buffers as part of said chip resources.
Claim 34
Dependent Claim
13 words
The method of claim 27 further including the step of removing redundant buses.
Claim 35
Dependent Claim
19 words
The method of claim 27 further including the step of removing predetermined secondary buffer signals assigned by a user.
Claim 36
Dependent Claim
20 words
The method of claim 27 further including the step of splitting candidate signals into their clock and logic connection components.
Claim 37
Dependent Claim
23 words
The method of claim 27 further including the step of allocating high fan-out signals to primary buffers as part of said chip resources.
Claim 38
Dependent Claim
24 words
The method of claim 27 further including the step of allocating high fan-out non-clock signals to secondary buffers as part of said chip resources.
Claim 39
Dependent Claim
25 words
The method of claim 27 further including the step of allocating high fan-out signals to primary and secondary buffers as part of said chip resources.
Claim 40
Dependent Claim
18 words
The method of claim 27 further including the step of allocating set signals or reset signals to buffers.
Claim 41
Dependent Claim
23 words
The method of claim 27 further including the step of allocating registers to input blocks or output blocks after said step of mapping.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-11-12 | 2000-05-13 | 2000-11-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-11-12 | 2004-05-13 | 2004-11-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-11-12 | 2008-05-13 | 2008-11-12 | $7700.00 | Window Closed / Lapsed |