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US5731231A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor apparatus, fabrication method therefor and board frame

Assignee: Toshiba Corp
•
Filing: 1997-03-13
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Granted: 1998-03-24
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Expires: 2017-03-13
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Abstract

Abstract A semiconductor apparatus has a wiring board having a wiring pattern and a plurality of connection electrodes formed on a surface thereof with the connection electrodes being electrically connected to the wiring pattern. A semiconductor device is mounted on a main surface of the wiring board and electrically connected to the wiring pattern. A resin-sealed structure is formed by a transfer mold for coating the main surface of the wiring board and the semiconductor device and having sides with a predetermined taper angle after coating. Those side edge portions of the resin-sealed structure which contact the main surface of the wiring board are in contact with edge portions of respective sides of the wiring board.

Inventors

  • 👤 Kenji Miyajima

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 11:38
CPC Classifications
H; H10; H10W; H10W76/00; H10W76/10; H10W76/12; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W74/117; H10W74/01; H10W74/016; H10W72/00; H10W72/50; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W90/00; H10W90/701; H10W90/721; H10W90/724; H10W90/751; H10W90/754

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 151 words
A method of fabricating a semiconductor apparatus, comprising the steps of: forming a plurality of wiring boards each having a wiring pattern and a plurality of connection electrodes electrically connected to said wiring pattern, on a board frame and punching said board frame according to each wiring board to make a plurality of wiring boards; pushing back said punched-out wiring boards to original positions of said board frame at which time glass fibers at contact surfaces of said wiring boards and said board frame, which have been produced at a time of punching said board frame, are entangled to hold said wiring boards and said board frame; mounting semiconductor devices on the surfaces of said wiring boards; electrically connecting said semiconductor devices to said wiring patterns; forming transfer moldings, covering said surfaces of said wiring boards and said semiconductor devices mounted thereon; and separating said wiring boards from said board frame.
Claim 2
Independent Claim 151 words
A method of fabricating a semiconductor apparatus, comprising the steps of: forming a plurality of wiring boards each having a wiring pattern and a plurality of connection electrodes electrically connected to said wiring pattern, on a board frame and punching said board frame according to each wiring board to make a plurality of wiring boards; pushing back said punched-out wiring boards to original positions of said board frame at which time glass fibers at contact surfaces of said wiring boards and said board frame, which have been produced at a time of punching said board frame, are entangled to hold said wiring boards and said board frame; mounting semiconductor devices on the surfaces of said wiring boards; electrically connecting said semiconductor devices to said wiring patterns; forming transfer moldings, covering said surfaces of said wiring boards and said semiconductor devices mounted thereon; and separating said wiring boards from said board frame.
Claim 3
Dependent Claim 34 words
A method of fabricating a semiconductor apparatus according to claim 1, wherein said side surfaces of said transfer moldings are inclined by an angle to a perpendicular passing the center of said wiring board.
Claim 4
Dependent Claim 46 words
The method according to claim 1, further comprising a step of forming solder bumps at back surfaces of said wiring boards respectively via said connection electrodes before or after said step of separating said wiring boards from said board frame after formation of said transfer moldings.
Claim 5
Dependent Claim 72 words
The method according to claim 1, further comprising a step of forming temporary tacking sections for enhancing the holding of said wiring boards in predetermined areas in those areas on boundaries between said board frame and said wiring boards where said wiring patterns are not formed, after said step of bushing back said wiring boards to original positions of said board frame but before said step of securely mounting said semiconductor devices.
Claim 6
Dependent Claim 72 words
The method according to claim 1, further comprising a step of forming temporary tacking sections for enhancing the holding of said wiring boards in predetermined areas in those areas on boundaries between said board frame and said wiring boards where said wiring patterns are not formed, after said step of bushing back said wiring boards to original positions of said board frame but before said step of securely mounting said semiconductor devices.
Claim 7
Independent Claim 53 words
The method according to any one of claims 1 to 5, wherein said step of forming said transfer moldings are performed in a die, and said board frame is placed in said die in such a manner that sides of a cavity of said die are arranged along sides of said wiring boards.

References Cited (Backward Citations)

US5422314A Cited
US5474958A Cited
US5336639A Cited
US5527740A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-03-23 2001-09-22 2002-03-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-03-23 2005-09-22 2006-03-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-03-23 2009-09-22 2010-03-24 $7700.00 Window Closed / Lapsed

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