US5740383A
Expired / Lapsed
US
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Dynamic arbitration priority
Assignee: Nvidia Corp
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Filing: 1995-12-22
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Granted: 1998-04-14
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Expires: 2015-12-22
Abstract
Abstract An arbitration controller that temporarily raises the priority of a graphic device's HWM request above that of the BitBLT engine while that device's LWM request is being served. In this manner, the BitBLT engine cannot interrupt the transfer of data to the graphics device. Each device capable of issuing memory access requests is categorized into one of four classes. The LWM requests are the highest priority requests, followed by CPU memory access requests, then BitBLT engine requests, and finally by HWM requests. When a LWM request is granted, the requesting device's HWM request is elevated to a priority between the CPU and the BitBLT engine. Once the LWM request is complete, the HWM request is served until either it completes, the CPU issues a memory access request, or another LWM request occurs.
Inventors
- 👤 Robert Marshall Nally
- 👤 Pete Edward Nelsen
- 👤 Douglas Hamilton
- 👤 Douglas Michael Berk
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 15:27
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/16; G06F13/18
Claims Analysis
Total Claims: 48
Claim 1
Independent Claim
83 words
Arbitration circuitry in a computer system, comprising: a first device having a predetermined high water mark and a predetermined low water mark associated therewith, first selected activity at the low water mark causing the first device to issue a first request having a first priority, second selected activity at the high water mark causing the first device to issue a second request having a second priority; circuitry for granting the first request; and circuitry for chaining the second request to the first request.
Claim 2
Dependent Claim
83 words
Arbitration circuitry in a computer system, comprising: a first device having a predetermined high water mark and a predetermined low water mark associated therewith, first selected activity at the low water mark causing the first device to issue a first request having a first priority, second selected activity at the high water mark causing the first device to issue a second request having a second priority; circuitry for granting the first request; and circuitry for chaining the second request to the first request.
Claim 3
Dependent Claim
29 words
The arbitration circuitry of claim 1, wherein the chaining circuitry comprises: circuitry for elevating the second priority above a third priority of a third request from a second device.
Claim 4
Dependent Claim
14 words
The arbitration circuitry of claim 2, wherein the third request comprises class C request.
Claim 5
Dependent Claim
13 words
The arbitration circuitry of claim 2, wherein the second device comprises BitBLT engine.
Claim 6
Dependent Claim
13 words
The arbitration circuitry of claim 1, wherein the requests comprise memory access requests.
Claim 7
Dependent Claim
12 words
The arbitration circuitry of claim 1, wherein the first device comprises FIFO.
Claim 8
Dependent Claim
14 words
The arbitration circuitry of claim 1, wherein the first request comprises class A request.
Claim 9
Dependent Claim
14 words
The arbitration circuitry of claim 1, wherein the second request comprises class D request.
Claim 10
Independent Claim
92 words
A method of arbitrating requests in a computer system, comprising the steps of: associating a predetermined high water mark and a predetermined low water mark with a first device; causing the first device to issue a first request upon first selected activity at the low water mark, the first request having a first priority; causing the first device to issue a second request upon second selected activity at the high water mark, the second request having a second priority; granting the first request; and chaining the second request to the first request.
Claim 11
Independent Claim
92 words
A method of arbitrating requests in a computer system, comprising the steps of: associating a predetermined high water mark and a predetermined low water mark with a first device; causing the first device to issue a first request upon first selected activity at the low water mark, the first request having a first priority; causing the first device to issue a second request upon second selected activity at the high water mark, the second request having a second priority; granting the first request; and chaining the second request to the first request.
Claim 12
Dependent Claim
25 words
The method of claim 9, wherein the chaining step comprises the step of: elevating the second priority above a third priority of a third request.
Claim 13
Dependent Claim
13 words
The method of claim 10, wherein the third request comprises class C request.
Claim 14
Dependent Claim
15 words
The method of claim 10, wherein the third request is issued by a BitBLT engine.
Claim 15
Dependent Claim
12 words
The method of claim 9, wherein the requests comprise memory access requests.
Claim 16
Dependent Claim
14 words
The method of claim 9, wherein the first request is issued by a FIFO.
Claim 17
Dependent Claim
13 words
The method of claim 9, wherein the first request comprises class A request.
Claim 18
Dependent Claim
13 words
The method of claim 9, wherein the second request comprises class D request.
Claim 19
Dependent Claim
114 words
Arbitration circuitry for arbitrating between first and second devices requesting memory access, comprising: means for associating a predetermined high water mark and a predetermined low water mark with a first device; means for causing the first device to issue a first memory access request upon first selected activity at the low water mark, the first request having a high priority; means for causing the first device to issue a second memory access request upon second selected activity at the high water marks the second request having a low priority; means for granting the first request; and means for temporarily elevating the second request above a medium priority memory access request from a second device.
Claim 20
Dependent Claim
114 words
Arbitration circuitry for arbitrating between first and second devices requesting memory access, comprising: means for associating a predetermined high water mark and a predetermined low water mark with a first device; means for causing the first device to issue a first memory access request upon first selected activity at the low water mark, the first request having a high priority; means for causing the first device to issue a second memory access request upon second selected activity at the high water marks the second request having a low priority; means for granting the first request; and means for temporarily elevating the second request above a medium priority memory access request from a second device.
Claim 21
Dependent Claim
12 words
The arbitration circuitry of claim 17, wherein the first device comprises FIFO.
Claim 22
Dependent Claim
15 words
The arbitration circuitry of claim 17, wherein the high priority request comprises class A request.
Claim 23
Dependent Claim
15 words
The arbitration circuitry of claim 17, wherein the low priority request comprises class D request.
Claim 24
Dependent Claim
15 words
The arbitration circuitry of claim 17, wherein the medium priority request comprises class C request.
Claim 25
Dependent Claim
13 words
The arbitration circuitry of claim 17, wherein the second device comprises BitBLT engine.
Claim 26
Independent Claim
78 words
A method of arbitrating among a plurality of devices issuing memory access requests of differing priorities, comprising the steps of: causing a first device to issue a high priority memory access request; granting the high priority memory access request; receiving a medium priority memory access request from a second device; receiving a low priority memory access request from the first device; and elevating the low priority memory access request in priority above the medium priority memory access request.
Claim 27
Independent Claim
78 words
A method of arbitrating among a plurality of devices issuing memory access requests of differing priorities, comprising the steps of: causing a first device to issue a high priority memory access request; granting the high priority memory access request; receiving a medium priority memory access request from a second device; receiving a low priority memory access request from the first device; and elevating the low priority memory access request in priority above the medium priority memory access request.
Claim 28
Dependent Claim
11 words
The method of claim 23, wherein the first device comprises FIFO.
Claim 29
Dependent Claim
12 words
The method of claim 23, wherein the second device comprises BitBLT engine.
Claim 30
Dependent Claim
16 words
The method of claim 23, wherein the high priority memory access request comprises class A request.
Claim 31
Dependent Claim
16 words
The method of claim 23, wherein the medium priority memory access request comprises class C request.
Claim 32
Dependent Claim
16 words
The method of claim 23, wherein the low priority memory access request comprises class D request.
Claim 33
Dependent Claim
42 words
Arbitration circuitry in a computer system, comprising: circuitry for granting a first request having a first priority from a first device, wherein the first device comprises FIFO; and circuitry for chaining a second request having a second priority to the first request.
Claim 34
Dependent Claim
42 words
Arbitration circuitry in a computer system, comprising: circuitry for granting a first request having a first priority from a first device, wherein the first device comprises FIFO; and circuitry for chaining a second request having a second priority to the first request.
Claim 35
Dependent Claim
29 words
The arbitration circuitry of claim 29, wherein the chaining circuitry comprises: circuitry for elevating the second priority above a third priority of a third request from a second device.
Claim 36
Dependent Claim
14 words
The arbitration circuitry of claim 30, wherein the third request comprises class C request.
Claim 37
Dependent Claim
13 words
The arbitration circuitry of claim 30, wherein the second device comprises BitBLT engine.
Claim 38
Dependent Claim
13 words
The arbitration circuitry of claim 29, wherein the requests comprise memory access requests.
Claim 39
Dependent Claim
14 words
The arbitration circuitry of claim 29, wherein the first request comprises class A request.
Claim 40
Dependent Claim
14 words
The arbitration circuitry of claim 29, wherein the second request comprises class D request.
Claim 41
Independent Claim
43 words
A method of arbitrating requests in a computer system, comprising the steps of: granting a first request having a first priority, wherein the first request is issued by a FIFO; and chaining a second request having a second priority to the first request.
Claim 42
Independent Claim
43 words
A method of arbitrating requests in a computer system, comprising the steps of: granting a first request having a first priority, wherein the first request is issued by a FIFO; and chaining a second request having a second priority to the first request.
Claim 43
Dependent Claim
25 words
The method of claim 36, wherein the chaining step comprises the step of: elevating the second priority above a third priority of a third request.
Claim 44
Dependent Claim
13 words
The method of claim 37, wherein the third request comprises class C request.
Claim 45
Dependent Claim
15 words
The method of claim 37, wherein the third request is issued by a BitBLT engine.
Claim 46
Dependent Claim
12 words
The method of claim 36, wherein the requests comprise memory access requests.
Claim 47
Dependent Claim
13 words
The method of claim 36, wherein the first request comprises class A request.
Claim 48
Dependent Claim
13 words
The method of claim 36, wherein the second request comprises class D request.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-04-13 | 2001-10-13 | 2002-04-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-04-13 | 2005-10-13 | 2006-04-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-04-13 | 2009-10-13 | 2010-04-14 | $7700.00 | Window Closed / Lapsed |