US5747222A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multi-layered circuit substrate and manufacturing method thereof
Assignee: Haesung DS Co Ltd
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Filing: 1996-09-11
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Granted: 1998-05-05
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Expires: 2016-09-11
Abstract
Abstract A multi-layered circuit substrate and a manufacturing method thereof comprising the steps of coating the upper surface of a substrate with a photosensitive insulating layer; exposing and developing the photosensitive insulating layer to form a photosensitive insulating layer of predetermined pattern and pattern spaces; forming a conductive layer by printing a conductive ink in the pattern spaces; and forming a plurality of layers by performing the previous steps, each layer comprising a photosensitive insulating layer of predetermined pattern and pattern spaces and a conductive layer formed in the pattern spaces. The method further comprises the steps of coating an uppermost layer of the plurality of layers with an adhesive insulating layer, forming a metallic thin-film on the adhesive insulating layer by thermal pressing; etching the metallic thin-film to form a predetermined pattern of a metallic thin film; and forming a through hole into which a conductive material is implanted, the through hole penetrating the substrate, conductive layer, photosensitive insulating layer and metallic thin-film so to electrically connect the conductive layer to the patterned metallic thin-film.
Inventors
- 👤 Jae-chul Ryu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 13:36
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/46; H10; H10W; H10W70/00; H10W70/01; H10W70/05; H10W70/095; H05K3/10; H05K3/12; H05K3/1258; H05K3/4644; H05K3/4664; H10W70/60; H10W70/611; H10W70/62; H10W70/63; H10W70/635; H05K1/00; H05K1/02; H05K1/09; H05K1/092; H05K1/095; H05K2203/00; H05K2203/05; H05K2203/0562; H05K2203/0568; H05K3/0011; H05K3/0017; H05K3/0023; H05K3/107; H05K3/38; H05K3/386; H05K3/44; H05K3/445; H05K3/465; H05K3/4652
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
198 words
A method of manufacturing a multi-layered circuit substrate, comprising the steps of: applying a photosensitive insulating layer over a principal surface of a substrate; exposing and developing said photosensitive insulating layer to form a photosensitive insulating layer of a predetermined pattern and pattern spaces; forming a conductive layer by printing a conductive ink in at least some of the pattern spaces; forming a plurality of layers, each layer comprising a photosensitive insulating layer of a predetermined pattern and pattern spaces and a conductive layer formed in at least some of said pattern spaces, by repeating the above exposing and forming steps; coating an uppermost layer of the plurality of layers with an adhesive insulating layer; forming a metallic thin-film on said adhesive insulating layer by thermal pressing; etching said metallic thin-film to form a predetermined metallic thin-film pattern; and forming a through hole into which a conductive material is implanted, the through hole extending from a top surface of said plurality of layers to a bottom surface of said plurality of layers and being formed in said substrate, conductive layers, photosensitive insulating layers, and metallic thin-film pattern to electrically connect said conductive layers to said metallic thin-film pattern.
Claim 2
Independent Claim
198 words
A method of manufacturing a multi-layered circuit substrate, comprising the steps of: applying a photosensitive insulating layer over a principal surface of a substrate; exposing and developing said photosensitive insulating layer to form a photosensitive insulating layer of a predetermined pattern and pattern spaces; forming a conductive layer by printing a conductive ink in at least some of the pattern spaces; forming a plurality of layers, each layer comprising a photosensitive insulating layer of a predetermined pattern and pattern spaces and a conductive layer formed in at least some of said pattern spaces, by repeating the above exposing and forming steps; coating an uppermost layer of the plurality of layers with an adhesive insulating layer; forming a metallic thin-film on said adhesive insulating layer by thermal pressing; etching said metallic thin-film to form a predetermined metallic thin-film pattern; and forming a through hole into which a conductive material is implanted, the through hole extending from a top surface of said plurality of layers to a bottom surface of said plurality of layers and being formed in said substrate, conductive layers, photosensitive insulating layers, and metallic thin-film pattern to electrically connect said conductive layers to said metallic thin-film pattern.
Claim 3
Dependent Claim
28 words
A method of manufacturing a multi-layered circuit substrate as recited in claim 1, wherein the conductive ink includes minute metal powders, a polymerizing reactive material, and a solvent.
Claim 4
Dependent Claim
51 words
A method of manufacturing a multi-layered circuit substrate as recited in claim 2, wherein the minute metal powders are selected from the group consisting of Cu--Pb--Sn and Ag--Pb--Sn, the polymerizing reactive material is an anhydride-series compound, and the solvent is selected from the group consisting of methyl ethyl ketone and acetone.
Claim 5
Dependent Claim
21 words
A method of manufacturing a multi-layered circuit substrate as recited in claim 3, wherein the polymerizing reactive material is Hexafluoroisopropyl-diphthalic anhydride.
Claim 6
Dependent Claim
31 words
A method of manufacturing a multi-layered circuit substrate as recited in claim 1, wherein at least one of said photosensitive insulating layers is without pattern spaces filled with the conductive ink.
Claim 7
Dependent Claim
21 words
A method of manufacturing a multi-layered circuit substrate as recited in claim 1, wherein the substrate is formed of a ceramic.
Claim 8
Dependent Claim
32 words
A method of manufacturing a multi-layered circuit substrate as recited in claim 1, wherein the substrate is formed of a metal selected from the group consisting of copper alloy and alloy 42.
Claim 9
Dependent Claim
59 words
A method of manufacturing a multi-layered circuit substrate as recited in claim 7, further comprising the steps of: forming a hole in a portion of said substrate where said through hole of said substrate is formed; and coating the surface of said substrate and filling said hole with an insulating material, before said first photosensitive insulating layer coating step.
Claim 10
Dependent Claim
52 words
A method of manufacturing a multi-layered circuit substrate as recited in claim 8, wherein the diameter of said hole is larger than the diameter of said through hole, such that said conductive material injected into said through hole is electrically insulated from said substrate by the insulating material filled within said hole.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-05-04 | 2001-11-03 | 2002-05-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-05-04 | 2005-11-03 | 2006-05-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-05-04 | 2009-11-03 | 2010-05-05 | $7700.00 | Window Closed / Lapsed |