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US5864512A Expired / Lapsed US ⏱️ 0.0 years remaining

High-speed video frame buffer using single port memory chips

Assignee: RPX Corp
•
Filing: 1997-04-11
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Granted: 1999-01-26
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Expires: 2017-04-11
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Abstract

Abstract This invention relates to providing high-speed video graphics through use of single ported memory chips on the video card.

Inventors

  • 👤 Matt E. Buckelew
  • 👤 Stewart G. Carlton
  • 👤 James L. Deming
  • 👤 Michael S. Farmer
  • 👤 Steven J. Heinrich
  • 👤 Mark A. Mosley
  • 👤 Clifford A. Whitmore

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 21:42
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/36; G09G5/363; G09G5/39; G09G5/393; G09G5/395; G11; G11C; G11C7/00; G11C7/10; G11C7/1015; G11C7/1018; G11C8/00; G11C8/04; G09G2360/00; G09G2360/12; G09G2360/121; G09G2360/123; G09G2360/128; G09G5/02; G09G5/022; G09G5/399

Claims Analysis

Total Claims: 30
Claim 1
Independent Claim 124 words
A device for storing pixel information for displaying a graphics image on a display, the information including an intensity value and a value associated with each of a plurality of additional planes for each pixel, the device comprising: a. a video frame buffer memory having a series of consecutive addresses for storing information to be output to the display, the buffer memory subdivided into a plurality of blocks, each block corresponding to a region of the display having a plurality of contiguous pixels; and b. a processor for placing the pixel information within the frame buffer memory so that in a given block there are placed at a first collection of consecutive addresses the intensity values for each of the pixels in the block.
Claim 2
Independent Claim 124 words
A device for storing pixel information for displaying a graphics image on a display, the information including an intensity value and a value associated with each of a plurality of additional planes for each pixel, the device comprising: a. a video frame buffer memory having a series of consecutive addresses for storing information to be output to the display, the buffer memory subdivided into a plurality of blocks, each block corresponding to a region of the display having a plurality of contiguous pixels; and b. a processor for placing the pixel information within the frame buffer memory so that in a given block there are placed at a first collection of consecutive addresses the intensity values for each of the pixels in the block.
Claim 3
Dependent Claim 15 words
A device according to claim 1, wherein the frame buffer memory has a single port.
Claim 4
Dependent Claim 42 words
A device according to claim 1, wherein the processor further includes an arrangement for placing at a second collection of consecutive addresses values for each of the pixels in the block associated with a first one of the plurality of additional planes.
Claim 5
Independent Claim 122 words
A device for storing pixel information for displaying a graphics image on a display, the information including an intensity value and a value associated with each of a plurality of additional planes for each pixel, the device comprising: a. a video frame buffer for storing information to be output to the display, the buffer memory having a plurality of banks, each bank being separately addressable and being subdivided into a plurality of blocks, each block corresponding to a region of the display having a plurality of contiguous pixels; and b. a processor for placing the pixel information within the frame buffer so that pixel information relating to first and second contiguous blocks is stored in different ones of the plurality of banks.
Claim 6
Independent Claim 122 words
A device for storing pixel information for displaying a graphics image on a display, the information including an intensity value and a value associated with each of a plurality of additional planes for each pixel, the device comprising: a. a video frame buffer for storing information to be output to the display, the buffer memory having a plurality of banks, each bank being separately addressable and being subdivided into a plurality of blocks, each block corresponding to a region of the display having a plurality of contiguous pixels; and b. a processor for placing the pixel information within the frame buffer so that pixel information relating to first and second contiguous blocks is stored in different ones of the plurality of banks.
Claim 7
Dependent Claim 57 words
A device according to claim 4, wherein the buffer memory has two banks, a first bank and a second bank, and the pixel information relating to first and second contiguous blocks is stored in the first and second banks respectively, so that there results a checkerboard form of allocation of pixels of the image over the display.
Claim 8
Dependent Claim 24 words
A device according to claim 5 wherein the contiguous blocks are rectangular in shape, each bank having more than 4 pixels on a side.
Claim 9
Dependent Claim 24 words
A device according to claim 5 wherein the contiguous blocks are rectangular in shape, each bank having more than 7 pixels on a side.
Claim 10
Dependent Claim 34 words
A device according to claim 5 wherein the contiguous blocks are rectangular in shape, each bank having more than 7 pixels on a first side, and more than 15 pixels on a second side.
Claim 11
Dependent Claim 34 words
A device according to claim 5 wherein the contiguous blocks are rectangular in shape, each bank having more than 7 pixels on a first side, and more than 31 pixels on a second side.
Claim 12
Dependent Claim 34 words
A device according to claim 5 wherein the contiguous blocks are rectangular in shape, each bank having more than 7 pixels on a first side, and more than 63 pixels on a second side.
Claim 13
Independent Claim 157 words
A device for storing pixel information for displaying a graphics image on a display, the information including an intensity value and a value associated with each of a plurality of additional planes for each pixel, the device comprising: a. a video frame buffer memory having a series of consecutive addresses for storing information to be output to the display, the buffer memory subdivided into a plurality of banks, each bank being separately addressable and subdivided into a plurality of blocks, each block corresponding to a region of the display having a plurality of contiguous pixels; and b. a processor for placing the pixel information within the frame buffer so that (i) pixel information relating to first and second contiguous blocks is stored in different ones of the plurality of banks, and (ii) in a given block there are placed at a first collection of consecutive addresses the intensity values for each of the pixels in the block.
Claim 14
Independent Claim 157 words
A device for storing pixel information for displaying a graphics image on a display, the information including an intensity value and a value associated with each of a plurality of additional planes for each pixel, the device comprising: a. a video frame buffer memory having a series of consecutive addresses for storing information to be output to the display, the buffer memory subdivided into a plurality of banks, each bank being separately addressable and subdivided into a plurality of blocks, each block corresponding to a region of the display having a plurality of contiguous pixels; and b. a processor for placing the pixel information within the frame buffer so that (i) pixel information relating to first and second contiguous blocks is stored in different ones of the plurality of banks, and (ii) in a given block there are placed at a first collection of consecutive addresses the intensity values for each of the pixels in the block.
Claim 15
Dependent Claim 56 words
A device according to claim 11, wherein the buffer memory has two banks, a first bank and a second, and the pixel information relating to first and second contiguous blocks is stored in the first and second banks respectively, so that there results a checkerboard form of allocation of pixels of the image over the display.
Claim 16
Independent Claim 123 words
A method for storing pixel information for displaying a graphics image on a display, the information including an intensity value and a value associated with each of a plurality of additional planes for each pixel, the method comprising: a. providing a video frame buffer memory having a series of consecutive addresses for storing information to be output to the display step, the buffer memory subdivided into a plurality of blocks, each block corresponding to a region of the display having a plurality of contiguous pixels, and b. placing the pixel information within the frame buffer memory so that in a given block there are placed at a first collection of consecutive addresses the intensity values for each of the pixels in the block.
Claim 17
Independent Claim 123 words
A method for storing pixel information for displaying a graphics image on a display, the information including an intensity value and a value associated with each of a plurality of additional planes for each pixel, the method comprising: a. providing a video frame buffer memory having a series of consecutive addresses for storing information to be output to the display step, the buffer memory subdivided into a plurality of blocks, each block corresponding to a region of the display having a plurality of contiguous pixels, and b. placing the pixel information within the frame buffer memory so that in a given block there are placed at a first collection of consecutive addresses the intensity values for each of the pixels in the block.
Claim 18
Dependent Claim 15 words
A method according to claim 13, wherein the frame buffer memory has a single port.
Claim 19
Dependent Claim 39 words
A method according to claim 13, wherein step (b) further comprises, placing at a second collection of consecutive addresses values for each of the pixels in the block associated with a first one of the plurality of additional planes.
Claim 20
Dependent Claim 15 words
A method according to claim 15, wherein the frame buffer memory has a single port.
Claim 21
Dependent Claim 56 words
A method according to claim 15, wherein step (b) further includes placing pixel information within the frame buffer memory so that in a given block there are placed at a third collection of consecutive addresses, the values for each of the pixels in the block associated with a second one of the plurality of additional planes.
Claim 22
Dependent Claim 15 words
A method according to claim 17, wherein the frame buffer memory has a single port.
Claim 23
Independent Claim 120 words
A method for storing pixel information for displaying a graphics image on a display, the information including an intensity value and a value associated with each of a plurality of additional planes for each pixel, the method comprising: a. providing a video frame buffer for storing information to be output to the display, the buffer memory having a plurality of banks, each bank being separately addressable and being subdivided into a plurality of blocks, each block corresponding to a region of the display having a plurality of contiguous pixels; and b. placing the pixel information within the frame buffer so that pixel information relating to first and second contiguous blocks is stored in different ones of the plurality of banks.
Claim 24
Independent Claim 120 words
A method for storing pixel information for displaying a graphics image on a display, the information including an intensity value and a value associated with each of a plurality of additional planes for each pixel, the method comprising: a. providing a video frame buffer for storing information to be output to the display, the buffer memory having a plurality of banks, each bank being separately addressable and being subdivided into a plurality of blocks, each block corresponding to a region of the display having a plurality of contiguous pixels; and b. placing the pixel information within the frame buffer so that pixel information relating to first and second contiguous blocks is stored in different ones of the plurality of banks.
Claim 25
Dependent Claim 56 words
A method according to claim 19, wherein the buffer memory has two banks, a first bank and a second, and the pixel information relating to first and second contiguous blocks is stored in the first and second banks respectively, so that there results a checkerboard form of allocation of pixels of the image over the display.
Claim 26
Dependent Claim 24 words
A method according to claim 19 wherein the contiguous blocks are rectangular in shape, each block having more than 4 pixels on a side.
Claim 27
Dependent Claim 24 words
A method according to claim 19 wherein the contiguous blocks are rectangular in shape, each block having more than 7 pixels on a side.
Claim 28
Dependent Claim 34 words
A method according to claim 19 wherein the contiguous blocks are rectangular in shape, each block having more than 7 pixels on a first side, and more than 15 pixels on a second side.
Claim 29
Dependent Claim 34 words
A method according to claim 19 wherein the contiguous blocks are rectangular in shape, each block having more than 7 pixels on a first side, and more than 31 pixels on a second side.
Claim 30
Dependent Claim 34 words
A method according to claim 19 wherein the contiguous blocks are rectangular in shape, each block having more than 7 pixels on a first side, and more than 63 pixels on a second side.

References Cited (Backward Citations)

EP0279229A2 Cited
US5170468A Cited
WO1989006031A2 Cited
US5187575A Cited
US5333299A Cited
US5517253A Cited
US5557342A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-01-25 2002-07-27 2003-01-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-01-25 2006-07-27 2007-01-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-01-25 2010-07-27 2011-01-26 $7700.00 Window Closed / Lapsed

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