Highly-integrated image sensing apparatus producing digitized output

Claim 2

An image sensing apparatus for sensing an object and for transmitting the image information to a bus line as digitized data, comprising: a solid state image sensor having a plurality of light-receiving elements aligned in a matrix form, said solid state image sensor storing information charges element by element produced by each light-receiving element in response to received light; a driver for providing said solid state image sensor with a clock pulse, said driver causing said solid state image sensor to sequentially output said information charges stored in said individual light-receiving elements in accordance with said clock pulse; a signal processor for producing image signals in a predetermined format in response to said information charges output from said solid state image sensor; an A/D converter for quantizing the image signals produced in said signal processor, said A/D converter producing image data corresponding to each light receiving element of said solid state image sensor; an output interface for outputting the image data produced by said A/D converter to said bus line; and said output interface operating between a supply voltage and a first ground voltage, said solid state image sensor and said signal processor operating between said supply voltage and a second ground voltage, wherein the second ground voltage has a lower potential than said first ground voltage.

Claim 3

The image sensing apparatus according to claim 1, wherein said signal processor and said A/D converter, together with said output interface, are integrated on an N-type semiconductor substrate.

Claim 4

The image sensing apparatus according to claim 2, wherein said supply voltage is applied to said substrate, said first ground voltage and said second ground voltage are applied to each component with separated wires.

Claim 5

The image sensing apparatus according to claim 1, further comprising a timing controller for producing timing signals to control said driver, and a data detector for detecting an average level of image signals produced in said signal processor or image data received from said A/D converter, said data detector performing feedback control to said signal processor for setting the average level within an appropriate range.

Claim 6

The image sensing apparatus according to claim 4, wherein said timing controller, said data detector and said output interface, together with said signal processor and said A/D converter, are integrated on said N-type semiconductor substrate.

Claim 7

An image sensing apparatus for sensing an object and for transmitting the image information to a bus line as digitized data, comprising: a solid state image sensor having a plurality of light-receiving elements aligned in a matrix form, said solid state image sensor storing information charges element by element produced by each light-receiving element in response to received light; a driver for providing said solid state image sensor with a clock pulse, said driver causing said solid state image sensor to sequentially output said information charges stored in said individual light-receiving elements in accordance with said clock pulse; a timing controller for producing timing signals for controlling said driver; a signal processor for producing image signals in a predetermined format in response to said information charges output from said solid state image sensor; an A/D converter for quantizing the image signals produced in said signal processor, said A/D converter producing image data corresponding to each light receiving element of said solid state image sensor; an output interface for outputting the image data produced by said A/D converter to said bus line; a data detector for detecting an average level of image signal produced in said signal processor or image data received from said A/D converter, said data detector performing feedback control to said signal processor for setting the average level within an appropriate range; an input interface for receiving control information provided from a computer system unit coupled to said bus line, said input interface outputting said control information to said data detector; and said input interface and said output interface operating between a supply voltage and a first ground voltage, said solid state image sensor and said signal processor operating between said supply voltage and a second ground voltage, wherein the second ground voltage has a lower potential than said first ground voltage.

Claim 8

An image sensing apparatus for sensing an object and for transmitting the image information to a bus line as digitized data, comprising: a solid state image sensor having a plurality of light-receiving elements aligned in a matrix form, said solid state image sensor storing information charges element by element produced by each light-receiving element in response to received light; a driver for providing said solid state image sensor with a clock pulse, said driver causing said solid state image sensor to sequentially output said information charges stored in said individual light-receiving elements in accordance with said clock pulse; a timing controller for producing timing signals for controlling said driver; a signal processor for producing image signals in a predetermined format in response to said information charges output from said solid state image sensor; an A/D converter for quantizing the image signals produced in said signal processor, said A/D converter producing image data corresponding to each light receiving element of said solid state image sensor; an output interface for outputting the image data produced by said A/D converter to said bus line; a data detector for detecting an average level of image signal produced in said signal processor or image data received from said A/D converter, said data detector performing feedback control to said signal processor for setting the average level within an appropriate range; an input interface for receiving control information provided from a computer system unit coupled to said bus line, said input interface outputting said control information to said data detector; and said input interface and said output interface operating between a supply voltage and a first ground voltage, said solid state image sensor and said signal processor operating between said supply voltage and a second ground voltage, wherein the second ground voltage has a lower potential than said first ground voltage.

Claim 9

The image sensing apparatus according to claim 6, wherein said timing controller, said signal processor, said A/D converter, said data detector, said output interface and said input interface are integrated on an N-type semiconductor substrate.

Claim 10

The image sensing apparatus according to claim 7, wherein said supply voltage is applied to said substrate, said first ground voltage and said second ground voltage are applied to each component with separated wires.