US5953626A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Dissolvable dielectric method
Assignee: GlobalFoundries Inc
•
Filing: 1996-06-05
•
Granted: 1999-09-14
•
Expires: 2016-06-05
Abstract
Abstract A fabrication process that produces an air gap dielectric in which a multi-level interconnect structure is formed upon a temporary supporting material. The temporary material is subsequently dissolved away leaving behind an intralevel and an interlevel dielectric comprised of air. In one embodiment of the invention, a first interconnect level is formed on a barrier layer. A temporary support material is then formed over the first interconnect level and a second level of interconnect is formed on the temporary support material. Prior to formation of the second interconnect level, a plurality of pillar openings are formed in the temporary material and filled with a conductive material. In addition to providing a contact between the first and second level of interconnects, the pillars provide mechanical support for the second interconnect level. The temporary material is dissolved in a solution that attacks the temporary material but leaves the interconnect material and pillar material intact. In one embodiment of the invention, a passivation layer is formed on the second interconnect level prior to dissolving the temporary material. The air gap dielectric can be used with more than two levels of interconnect, if desired.
Inventors
- 👤 Fred N. Hause
- 👤 Basab Bandyopadhyay
- 👤 Robert Dawson
- 👤 H. Jim Fulford, Jr.
- 👤 Mark W. Michael
- 👤 William S. Brennan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 07:59
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/072; H10W20/40; H10W20/45; H10W20/46
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
261 words
A method of fabricating interconnect levels on a semiconductor substrate comprising: forming a barrier layer on said substrate; forming a first interconnect level on said barrier layer wherein said first interconnect level comprises a plurality of substantially coplanar first conductors; forming a first temporary support material on said first interconnect level, said first temporary support material comprising an upper surface and a lower surface; forming a plurality of vias in said first temporary support material, said plurality of vias extending from said upper surface of said first temporary support material to said lower surface of said first temporary support material and wherein at least one of said plurality of vias communicates with one or more of said first conductors; filling said plurality of vias with a conductive material to form a plurality of permanent support pillars having an upper end substantially coplanar with said upper surface of said first temporary support material, wherein at least one of said permanent support pillars contacts at least one of said plurality of first conductors; forming a second temporary support material and a second interconnect level on said first temporary support layer wherein said second interconnect level comprises a plurality of substantially coplanar second conductors spaced apart by said second temporary support material; and concurrently removing said first and second temporary support materials from said first and second interconnect levels such that said plurality of second conductors are separated from said first conductors by air and wherein said second conductors are supported above said plurality of first conductors by said plurality of permanent conductive pillars.
Claim 2
Independent Claim
261 words
A method of fabricating interconnect levels on a semiconductor substrate comprising: forming a barrier layer on said substrate; forming a first interconnect level on said barrier layer wherein said first interconnect level comprises a plurality of substantially coplanar first conductors; forming a first temporary support material on said first interconnect level, said first temporary support material comprising an upper surface and a lower surface; forming a plurality of vias in said first temporary support material, said plurality of vias extending from said upper surface of said first temporary support material to said lower surface of said first temporary support material and wherein at least one of said plurality of vias communicates with one or more of said first conductors; filling said plurality of vias with a conductive material to form a plurality of permanent support pillars having an upper end substantially coplanar with said upper surface of said first temporary support material, wherein at least one of said permanent support pillars contacts at least one of said plurality of first conductors; forming a second temporary support material and a second interconnect level on said first temporary support layer wherein said second interconnect level comprises a plurality of substantially coplanar second conductors spaced apart by said second temporary support material; and concurrently removing said first and second temporary support materials from said first and second interconnect levels such that said plurality of second conductors are separated from said first conductors by air and wherein said second conductors are supported above said plurality of first conductors by said plurality of permanent conductive pillars.
Claim 3
Dependent Claim
12 words
The method of claim 1 wherein said barrier layer comprises silicon nitride.
Claim 4
Dependent Claim
12 words
The method of claim 1 wherein said barrier layer comprises undoped polysilicon.
Claim 5
Dependent Claim
12 words
The method of claim 1 wherein said barrier layer comprises metal oxide.
Claim 6
Dependent Claim
45 words
The method of claim 1 wherein the step of forming said first interconnect level comprises depositing a conductive material on said barrier layer, patterning a photoresist layer on said conductive material, and etching said conductive material to produce said plurality of substantially coplanar first conductors.
Claim 7
Dependent Claim
14 words
The method of claim 5 wherein said conductive material comprises aluminum, copper, or tungsten.
Claim 8
Dependent Claim
14 words
The method of claim 1 wherein said conductive material comprises aluminum, copper, or tungsten.
Claim 9
Dependent Claim
24 words
The method of claim 1 wherein said temporary material comprises oxide formed from a chemical vapor deposition process using a TEOS or silane source.
Claim 10
Dependent Claim
67 words
The method of claim 1 wherein said forming a second temporary support material and a second interconnect level comprises depositing said temporary support material on said first temporary support material, etching a plurality of second trenches into said second temporary support material, depositing a conductive material in said plurality of second trenches, and polishing back said conductive material to produce said plurality of substantially coplanar second conductors.
Claim 11
Dependent Claim
47 words
The method of claim 1 wherein the step of forming said second interconnect level comprises depositing a conductive material on said first temporary support layer, patterning a photoresist layer on said conductive material, and etching said conductive material to produce said plurality of substantially coplanar first conductors.
Claim 12
Dependent Claim
38 words
The method of claim 1 further comprising: depositing a passivation layer on said second interconnect level; and etching a plurality of vias through said passivation layer wherein said passivation layer vias are horizontally displaced from said second conductors.
Claim 13
Dependent Claim
16 words
The method of claim 11 further comprising depositing a capping dielectric layer on said passivation layer.
References Cited (Backward Citations)
US4182023A
Cited
US4675074A
Cited
JPS63179548A
Cited
JPH01296641A
Cited
US5001079A
Cited
US5272100A
Cited
US4899439A
Cited
US4920639A
Cited
US5117276A
Cited
US5716861A
Cited
US5462884A
Cited
JPH05206120A
Cited
US5444015A
Cited
US5426072A
Cited
US5310700A
Cited
US5386142A
Cited
US5324683A
Cited
US5393709A
Cited
US5832601A
Cited
US5665632A
Cited
US5512775A
Cited
US5407860A
Cited
US5559049A
Cited
US5567982A
Cited
US5559055A
Cited
US5741736A
Cited
US5759913A
Cited
US5783864A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-09-13 | 2003-03-15 | 2003-09-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-09-13 | 2007-03-15 | 2007-09-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-09-13 | 2011-03-15 | 2011-09-14 | $7700.00 | Window Closed / Lapsed |