US6017814A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Structure and fabrication method for stackable, air-gap-containing low epsilon dielectric layers
Assignee: GlobalFoundries Inc
•
Filing: 1998-11-13
•
Granted: 2000-01-25
•
Expires: 2018-11-13
Abstract
Abstract A structured dielectric layer and fabrication process for separating wiring levels and wires within a level on a semiconductor chip is described incorporating a lower dielectric layer having narrow air gaps to form dielectric pillars or lines and an upper dielectric layer formed over the pillars or fine lines wherein the air gaps function to substantially reduce the effective dielectric constant of the structured layer. The invention overcomes the problem of solid dielectric layers which would have the higher dielectric constant of the solid material used.
Inventors
- 👤 Alfred Grill
- 👤 Katherine Lynn Saenger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 22:41
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/072; H10W20/40; H10W20/45; H10W20/46; H10W20/48; H10W20/495
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
83 words
A method to make structured dielectric layers comprising the steps of: depositing a blanket layer of a first dielectric on a substrate etching circuit patterns into said first dielectric and blanket depositing a conductive wiring material to fill the circuit patterns, planarizing the wiring material and slightly overetching said first dielectric, patterning said first dielectric to form air gaps, depositing a thin layer of a second dielectric over said structure, and planarizing said second dielectric to expose the top surface of said wire.
Claim 2
Independent Claim
83 words
A method to make structured dielectric layers comprising the steps of: depositing a blanket layer of a first dielectric on a substrate etching circuit patterns into said first dielectric and blanket depositing a conductive wiring material to fill the circuit patterns, planarizing the wiring material and slightly overetching said first dielectric, patterning said first dielectric to form air gaps, depositing a thin layer of a second dielectric over said structure, and planarizing said second dielectric to expose the top surface of said wire.
References Cited (Backward Citations)
US4169000A
Cited
US5461003A
Cited
US5559367A
Cited
US5462784A
Cited
US5783864A
Cited
US5814555A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-01-24 | 2003-07-26 | 2004-01-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-01-24 | 2007-07-26 | 2008-01-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-01-24 | 2011-07-26 | 2012-01-25 | $7700.00 | Window Closed / Lapsed |