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US6020924A Expired / Lapsed US ⏱️ 0.0 years remaining

Reduced memory size set top box which stores frames and associated motion vectors which indicate which block or blocks are to be retrieved from memory

Assignee: Samsung Electronics Co Ltd
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Filing: 1996-04-12
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Granted: 2000-02-01
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Expires: 2016-04-12
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Abstract

Abstract A real time decoder converts received compressed digital video signals to television luma and chroma format for current display. Incoming signals are error checked and corrected and directly stored in compressed format in a memory under control of a digital signal processor. For each video frame to be currently displayed, a current data block is identified and stored in a current block buffer. Data blocks from a previous frame are identified from motion vector data of the current block and accessed from memory to be temporarily stored in one or more buffers. Inverse discrete cosine transformation decodes the data blocks, the resulting data being added to difference data in the current data block, the resulting data fed to a post processor for output as television format signals.

Inventors

  • 👤 Musa Jahanghir

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 03:58
CPC Classifications
H; H04; H04N; H04N19/00; H04N19/42; H04N19/423; H04N19/60; H04N19/61

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 109 words
Apparatus for real time conversion of received coded and compressed digital video motion picture signals to display compatible format signals comprising: a digital signal processor for receiving compressed video signals representing video display frames; a memory for storing frames and associated motion vectors of said video signals in compressed form, wherein the motion vectors indicate which block or blocks are to be retrieved from said memory; block processor decoder means for decoding and decompressing data blocks of the compressed video display frames retrieved from said memory; and post processing means for outputting data received from said block processor decoder means in line by line luma and chroma television format.
Claim 2
Dependent Claim 109 words
Apparatus for real time conversion of received coded and compressed digital video motion picture signals to display compatible format signals comprising: a digital signal processor for receiving compressed video signals representing video display frames; a memory for storing frames and associated motion vectors of said video signals in compressed form, wherein the motion vectors indicate which block or blocks are to be retrieved from said memory; block processor decoder means for decoding and decompressing data blocks of the compressed video display frames retrieved from said memory; and post processing means for outputting data received from said block processor decoder means in line by line luma and chroma television format.
Claim 3
Dependent Claim 50 words
Apparatus as recited in claim 1, wherein said block processor decoder means comprises: a plurality of temporary storage means; a multiplexer connected to receive data from said temporary storage means, and an arithmetic logic unit processor connected to said multiplexer for performing inverse discrete cosine transformation of said data blocks.
Claim 4
Dependent Claim 103 words
Apparatus as recited in claim 2, wherein said plurality of temporary storage means comprises: current block storage means for storing a current data block to be reconstructed, said current data block containing motion vector data relating to at least one block of data from a previous data frame and data for a current frame; at least one buffer for receiving data identified by said motion vector data and storing data received in reiterative manner from said arithmetic logic unit processor during inverse discrete cosine transformation; and a search window block storage for storing at least one reconstructed data block received from said buffer.
Claim 5
Dependent Claim 45 words
Apparatus as recited in claim 3, wherein said arithmetic logic unit processor comprises a plurality of stages, each comprising: a logic unit having first and second inputs and an output; multiplier/accumulator means connected to said first input; and a data latch connected to said output.
Claim 6
Dependent Claim 33 words
Apparatus as recited in claim 4, wherein said first input is connected to the data latch of a previous stage and said multiplier/accumulator means performs fixed-coefficient multiplication on data received from said multiplexer.
Claim 7
Dependent Claim 19 words
Apparatus as recited in claim 3, wherein said post processor means comprises a post processor and a line buffer.
Claim 8
Dependent Claim 113 words
In a video signal receiver system including a video display apparatus, a method for real time decoding and decompression of transmitted incoming digital video signals as received comprising the steps of: storing frames and associated motion vectors of said incoming digital video signals in compressed format in a memory, wherein the motion vectors indicate which block or blocks are to be retrieved from said memory; accessing from said memory compressed data representing information for a video frame to be currently displayed; decoding and converting the accessed data to luma and chroma format data compatible with television display; and outputting said luma and chroma format data line by line to said video display apparatus.
Claim 9
Dependent Claim 113 words
In a video signal receiver system including a video display apparatus, a method for real time decoding and decompression of transmitted incoming digital video signals as received comprising the steps of: storing frames and associated motion vectors of said incoming digital video signals in compressed format in a memory, wherein the motion vectors indicate which block or blocks are to be retrieved from said memory; accessing from said memory compressed data representing information for a video frame to be currently displayed; decoding and converting the accessed data to luma and chroma format data compatible with television display; and outputting said luma and chroma format data line by line to said video display apparatus.
Claim 10
Dependent Claim 37 words
A method as recited in claim 7, wherein said storing step comprises: identifying video display frame and block designations of the compressed data contained in said incoming digital video signals; and writing said data in said memory.
Claim 11
Dependent Claim 23 words
A method as recited in claim 8, wherein said storing step further comprises checking and correcting for errors in the received digital signals.
Claim 12
Dependent Claim 17 words
A method as recited in claim 8, wherein said step of decoding comprises inverse discrete cosine transformation.
Claim 13
Dependent Claim 70 words
A method as recited in claim 10, wherein said step of decoding further comprises: identifying a current data block containing video information to be displayed in a current frame; storing said current data block in a first temporary buffer; accessing from said memory a compressed data block from a previous frame that is referenced in said current data block; and storing the accessed data block in a second temporary buffer.
Claim 14
Dependent Claim 43 words
A method as recited in claim 11, wherein said inverse discrete transformation comprises: multiplexing data from said first and second temporary buffers; applying fixed-coefficient multiplication to the multiplexed data to obtain resultant data; and storing said resultant data in said second temporary buffer.
Claim 15
Dependent Claim 31 words
A method as recited in claim 12, wherein said steps of multiplexing, applying and storing are repeated in successive iterations until the data in said second temporary buffer is fully decoded.
Claim 16
Dependent Claim 156 words
A method as recited in claim 12, wherein said current data block contains motion vector information identifying a plurality of compressed data blocks of a previous frame that contain data to be referenced in reconstructing the current data block and said step of decoding and converting further comprises: transferring the fully decoded data of said second temporary buffer to a search window buffer; storing a second one of said plurality of previous frame data blocks in said second buffer; applying reiterative inverse discrete cosine transformation on the data in said second buffer until the second data block is fully decoded; transferring said fully decoded second data block to said search window buffer; fully decoding any additional ones of said previous frame data blocks and storing the decoded data in said search window buffer; and adding difference information included in said current block data to data accessed from said search window buffer to obtain video output data.

References Cited (Backward Citations)

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US5198901A Cited
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US5311310A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-01-31 2003-08-02 2004-02-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-01-31 2007-08-02 2008-02-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-01-31 2011-08-02 2012-02-01 $7700.00 Window Closed / Lapsed

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