US6356862B2
Expired / Lapsed
US
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Hardware and software co-verification employing deferred synchronization
Assignee: Mentor Graphics Corp
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Filing: 1998-09-24
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Granted: 2002-03-12
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Expires: 2018-09-24
Abstract
Abstract Hardware and software of a system is co-verified with synchronization events generated in the respective hardware and software verifications being accumulated and provided to the other verification on a periodic basis. The faster verification is halted to allow the slower verification to catch up, upon expiration of a synchronization window. Once caught up, the accumulated synchronization events are provided to the respective other verification. The transferred synchronization events are then in turn injected into the other verification at the same offset time into a synchronization period the synchronization events occurred in the previous synchronization period.
Inventors
- 👤 Brian Bailey
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 09:01
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/32; G06F30/33
Claims Analysis
Total Claims: 41
Claim 1
Independent Claim
51 words
A method comprising: accumulating first synchronization events of a verification of a software execution within a system; and periodically, providing the accumulated first synchronization events to a verification of a hardware portion of the system, and receiving accumulated second synchronization events of the verification of the hardware portion of the system.
Claim 2
Independent Claim
51 words
A method comprising: accumulating first synchronization events of a verification of a software execution within a system; and periodically, providing the accumulated first synchronization events to a verification of a hardware portion of the system, and receiving accumulated second synchronization events of the verification of the hardware portion of the system.
Claim 3
Dependent Claim
55 words
The method of claim 1 , wherein said accumulating of first synchronization events includes storing the first synchronization events in a first organized data structure, and said receiving of accumulated second synchronization events of the verification of the hardware portion of the system includes storing the second synchronization events in a second organized data structure.
Claim 4
Dependent Claim
30 words
The method of claim 1 , wherein said accumulating of first synchronization events includes accumulating first memory writing operations generated by the verification of the software execution within the system.
Claim 5
Dependent Claim
27 words
The method of claim 1 , wherein the providing of accumulated first synchronization events and receiving of accumulated second synchronization events are performed at predetermined synchronization intervals.
Claim 6
Dependent Claim
19 words
The method of claim 4 , wherein the method further includes configuring the size of the predetermined synchronization interval.
Claim 7
Dependent Claim
28 words
The method of claim 5 , wherein said configuring includes configuring the size of the predetermined synchronization interval from a first smaller size to a second larger size.
Claim 8
Dependent Claim
28 words
The method of claim 5 , wherein said configuring includes configuring the size of the predetermined synchronization interval from a first larger size to a second smaller size.
Claim 9
Dependent Claim
34 words
The method of claim 7 , wherein said configuring from a first larger size to a second smaller size includes reducing the predetermined synchronization interval to where a last event to be synchronized transpired.
Claim 10
Dependent Claim
27 words
The method of claim 7 , wherein said configuring from a first larger size to a second smaller size includes compressing verification time by a compression ratio.
Claim 11
Dependent Claim
28 words
The method of claim 7 , wherein said configuring further includes repeating said configuring from a first larger size to a second smaller size with incrementally smaller sizes.
Claim 12
Dependent Claim
37 words
The method of claim 1 , wherein the method further comprises injecting the received accumulated second synchronization events into the verification of the software execution within the system at corresponding timing offsets into a current synchronization frame.
Claim 13
Independent Claim
66 words
An apparatus comprising: a flow detector to monitor, detect and accumulate first synchronization events of a verification of a software execution within a system; and a synchronizer coupled to the flow detector to periodically provide the accumulated first synchronization events to a verification of a hardware portion of the system, and receive accumulated second synchronization events of the verification of the hardware portion of the system.
Claim 14
Independent Claim
66 words
An apparatus comprising: a flow detector to monitor, detect and accumulate first synchronization events of a verification of a software execution within a system; and a synchronizer coupled to the flow detector to periodically provide the accumulated first synchronization events to a verification of a hardware portion of the system, and receive accumulated second synchronization events of the verification of the hardware portion of the system.
Claim 15
Dependent Claim
46 words
The apparatus of claim 12 , wherein the flow detector includes a first organized data structure for accumulating the first synchronization events, and a second organized data structure for storing the received accumulated second synchronization events of the verification of the hardware portion of the system.
Claim 16
Dependent Claim
36 words
The apparatus of claim 12 , wherein the flow detector injects the received accumulated second synchronization events into the verification of the software execution within the system at corresponding timing offsets into a current synchronization frame.
Claim 17
Dependent Claim
26 words
The apparatus of claim 12 , wherein the synchronizer provides the accumulated first synchronization events and receives the accumulated second synchronization events at predetermined synchronization intervals.
Claim 18
Dependent Claim
22 words
The apparatus of claim 15 , wherein the apparatus further includes a configurator to configure/reconfigure the size of the predetermined synchronization interval.
Claim 19
Dependent Claim
20 words
The apparatus of claim 16 , wherein the configurator is also used to compress verification time by a compression ratio.
Claim 20
Dependent Claim
41 words
The apparatus of claim 12 , wherein the apparatus further includes a selected one of an instruction set simulator and a set of compiled code, coupled to the flow detector, to perform said verification of the software execution within the system.
Claim 21
Dependent Claim
30 words
The apparatus of claim 12 , wherein the apparatus further includes a transaction level simulator coupled to the synchronizer to perform the verification of the hardware portion of the system.
Claim 22
Dependent Claim
120 words
The apparatus of claim 19 , wherein the apparatus further includes a selected one of an instruction set simulator and a set of compiled code, coupled to the flow detector, to perform said verification of the software execution within the system. a selected one of a logic simulator and emulator to perform a second verification of the hardware portion of the system; and an optimizing coordinator coupled to the selected one of the instruction set simulator and the set of compiled code, and to the selected one of the logic simulator and emulator, to optimize certain memory accesses performed by the verification of the software execution within the system and the second verification of the hardware portion of the system.
Claim 23
Dependent Claim
79 words
A storage medium having stored therein a plurality of programming instructions that are logically related to each other in such a manner, that when executed by a processor, the programming instructions accumulate first synchronization events of a verification of a software execution within a system, and periodically, provide the accumulated first synchronization events to a verification of a hardware portion of the system, and receive accumulated second synchronization events of the verification of the hardware portion of the system.
Claim 24
Dependent Claim
79 words
A storage medium having stored therein a plurality of programming instructions that are logically related to each other in such a manner, that when executed by a processor, the programming instructions accumulate first synchronization events of a verification of a software execution within a system, and periodically, provide the accumulated first synchronization events to a verification of a hardware portion of the system, and receive accumulated second synchronization events of the verification of the hardware portion of the system.
Claim 25
Dependent Claim
28 words
The storage medium of claim 21 , wherein the programming instructions provide the accumulated first synchronization events and receive the accumulated second synchronization events at predetermined synchronization intervals.
Claim 26
Dependent Claim
20 words
The storage medium of claim 22 , wherein the programming instructions further configure the size of the predetermined synchronization interval.
Claim 27
Dependent Claim
19 words
The storage medium of claim 23 , wherein the programming instructions also compress verification time by a compression ratio.
Claim 28
Dependent Claim
27 words
The storage medium of claim 21 , wherein the programming instructions also inject the received accumulated second synchronization events at corresponding offsets into a current synchronization frame.
Claim 29
Independent Claim
105 words
A method comprising: coordinating a verification of a software execution within a system and a first verification of a hardware portion of a system employing a deferred synchronization approach to enhance performance of the verification of the software execution within the system and the first verification of the hardware portion of the system; and coordinating the verification of the software execution within the system and a second verification of the hardware portion of the system employing optimization to certain memory accesses to enhance performance of the verification of the software execution within the system and the second verification of the hardware portion of the system.
Claim 30
Independent Claim
105 words
A method comprising: coordinating a verification of a software execution within a system and a first verification of a hardware portion of a system employing a deferred synchronization approach to enhance performance of the verification of the software execution within the system and the first verification of the hardware portion of the system; and coordinating the verification of the software execution within the system and a second verification of the hardware portion of the system employing optimization to certain memory accesses to enhance performance of the verification of the software execution within the system and the second verification of the hardware portion of the system.
Claim 31
Dependent Claim
81 words
The method of claim 26 , wherein the coordinating of the verification of the software execution within the system and the first verification of the hardware portion of the system includes accumulating first synchronization events of the verification of the software execution within the system, and periodically, providing the accumulated first synchronization events to the first verification of the hardware portion of the system, and receiving accumulated second synchronization events of the first verification of the hardware portion of the system.
Claim 32
Dependent Claim
52 words
The method of claim 27 , wherein the periodic providing of the accumulated first synchronization events to the first verification of the hardware portion of the system, and receiving of the accumulated second synchronization events of the first verification of the hardware portion of the system are performed at predetermined synchronization intervals.
Claim 33
Dependent Claim
69 words
The method of claim 27 , wherein the coordinating of the verification of the software execution within the system and the first verification of the hardware portion of the system further includes injecting the received accumulated second synchronization events of the first verification of the hardware portion of the system into the verification of the software execution within the system at corresponding offsets into a current predetermined synchronization interval.
Claim 34
Independent Claim
112 words
An apparatus comprising: a first coordinator to coordinate a verification of a software execution within a system and a first verification of a hardware portion of the system employing a deferred synchronization approach to enhance performance of the verification of the software execution within the system and first verification of the hardware portion of the system; and a second coordinator to coordinate the verification of the software execution within the system and a second verification of the hardware portion of the system employing optimization to certain memory accesses to enhance performance of the verification of the software execution within the system and the second verification of the hardware portion of the system.
Claim 35
Independent Claim
112 words
An apparatus comprising: a first coordinator to coordinate a verification of a software execution within a system and a first verification of a hardware portion of the system employing a deferred synchronization approach to enhance performance of the verification of the software execution within the system and first verification of the hardware portion of the system; and a second coordinator to coordinate the verification of the software execution within the system and a second verification of the hardware portion of the system employing optimization to certain memory accesses to enhance performance of the verification of the software execution within the system and the second verification of the hardware portion of the system.
Claim 36
Dependent Claim
76 words
The apparatus of claim 30 , wherein the first coordinator includes a flow detector to monitor, detect and accumulate first synchronization events of the verification of the software execution within the system, and a synchronizer coupled to the flow detector, to periodically provide the accumulated first synchronization events to the first verification of the hardware portion of the system, and receive accumulated second synchronization events of the first verification of the hardware portion of the system.
Claim 37
Dependent Claim
64 words
The apparatus of claim 31 , wherein the apparatus further comprises a configurator to configure a size for a predetermined synchronization interval to periodically perform said providing of the accumulated first synchronization events to the first verification of the hardware portion of the system, and said receiving of the accumulated second synchronization events of the first verification of the hardware portion of the system.
Claim 38
Dependent Claim
47 words
The apparatus of claim 31 , wherein the flow detector injects the received accumulated second synchronization events of the first verification of the hardware portion of the system into the verification of the software execution within the system at corresponding offsets into a current predetermined synchronization interval.
Claim 39
Dependent Claim
41 words
The apparatus of claim 30 , wherein the apparatus further includes a selected one of an instruction set simulator and a set of compiled code, coupled to the flow detector, to perform said verification of the software execution within the system.
Claim 40
Dependent Claim
30 words
The apparatus of claim 30 , wherein the apparatus further includes a transaction level simulator couple to the synchronizer to perform the verification of the hardware portion of the system.
Claim 41
Dependent Claim
119 words
The apparatus of claim 30 , wherein the apparatus further includes: a selected one of an instruction set simulator and a set of compiled code, coupled to the flow detector, to perform the verification of the software execution within the system; a selected one of a logic simulator and emulator to perform the second verification of the hardware portion of the system; and an optimizing coordinator coupled to the selected one of the instruction set simulator and the set of compiled code, and to the selected one of the logic simulator and emulator, to optimize certain memory accesses performed by the verification of the software execution within the system and second verification of the hardware portion of the system.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-03-11 | 2005-09-10 | 2006-03-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-03-11 | 2009-09-10 | 2010-03-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-03-11 | 2013-09-10 | 2014-03-12 | $7700.00 | Window Closed / Lapsed |