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US9973926B2 Active / In Force US ⏱️ 9.3 years remaining

Secure multi-channel communication system and method

Assignee: Visa International Service Association
•
Filing: 2016-02-03
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Granted: 2018-05-15
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Expires: 2036-02-03
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Abstract

Abstract One embodiment of the invention is directed to a method comprising receiving a plurality of data packets including encoded data. The method further comprises determining a plurality of time delays between the plurality of data packets, and translating the plurality of time delays to obtain a decoding key for decoding the encoded data in the data packets. The decoding key may be used to decode the encoded data to obtain the data.

Inventors

  • 👤 Cesar Otero
  • 👤 Patrick Faith

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 15:22
CPC Classifications
H; H04; H04W; H04W12/00; H04W12/04; H04L; H04L9/00; H04L9/08; H04L9/0861; H04L9/0872; H04W12/03; H04L63/00; H04L63/04; H04L63/0428; H04W12/02; H04W12/60; H04W12/61

Claims Analysis

Total Claims: 24
Claim 1
Independent Claim 139 words
A computer comprising: a processor; and a memory coupled to the processor, the memory storing instructions, which when executed by the processor, cause the computer to perform operations including: receiving a plurality of data packets including encoded data, determining a plurality of time delays between the plurality of data packets, translating the plurality of time delays to obtain a decoding key for decoding the encoded data in the data packets, wherein translating the plurality of time delays includes: retrieving a mapping table, for each time delay in the plurality of time delays: correlating the time delay to an entry in the mapping table, and retrieving a value associated with the entry, and concatenating the retrieved values to form a string of characters corresponding to the decoding key; and decoding the encoded data using the decoding key to obtain data.
Claim 2
Dependent Claim 139 words
A computer comprising: a processor; and a memory coupled to the processor, the memory storing instructions, which when executed by the processor, cause the computer to perform operations including: receiving a plurality of data packets including encoded data, determining a plurality of time delays between the plurality of data packets, translating the plurality of time delays to obtain a decoding key for decoding the encoded data in the data packets, wherein translating the plurality of time delays includes: retrieving a mapping table, for each time delay in the plurality of time delays: correlating the time delay to an entry in the mapping table, and retrieving a value associated with the entry, and concatenating the retrieved values to form a string of characters corresponding to the decoding key; and decoding the encoded data using the decoding key to obtain data.
Claim 3
Dependent Claim 35 words
The computer of claim 1 , wherein the decoding key includes one or more of a decryption key and location data indicating one or more locations of fake data in the plurality of data packets.
Claim 4
Dependent Claim 12 words
The computer of claim 1 , wherein the data is transaction data.
Claim 5
Dependent Claim 121 words
A computer comprising: a processor; and a memory coupled to the processor, the memory storing instructions, which when executed by the processor, cause the computer to perform operations including: receiving a plurality of data packets including encoded data, wherein the plurality of data packets are received at different frequencies, determining a plurality of time delays between the plurality of data packets, wherein determining the plurality of time delays between the plurality of data packets comprises calculating the plurality of time delays separately for data packets received at each frequency, translating the plurality of time delays to obtain a decoding key for decoding the encoded data in the data packets; and decoding the encoded data using the decoding key to obtain data.
Claim 6
Dependent Claim 121 words
A computer comprising: a processor; and a memory coupled to the processor, the memory storing instructions, which when executed by the processor, cause the computer to perform operations including: receiving a plurality of data packets including encoded data, wherein the plurality of data packets are received at different frequencies, determining a plurality of time delays between the plurality of data packets, wherein determining the plurality of time delays between the plurality of data packets comprises calculating the plurality of time delays separately for data packets received at each frequency, translating the plurality of time delays to obtain a decoding key for decoding the encoded data in the data packets; and decoding the encoded data using the decoding key to obtain data.
Claim 7
Dependent Claim 19 words
The computer of claim 4 , wherein data packets received at different frequencies correspond to different portions of data.
Claim 8
Dependent Claim 35 words
The computer of claim 4 , wherein the decoding key includes one or more of a decryption key and location data indicating one or more locations of fake data in the plurality of data packets.
Claim 9
Dependent Claim 121 words
A computer comprising: a processor; and a memory coupled to the processor, the memory storing instructions, which when executed by the processor, cause the computer to perform operations including: receiving a plurality of data packets including encoded data, wherein the plurality of data packets are received at different frequencies, determining a plurality of time delays between the plurality of data packets, wherein determining the plurality of time delays between the plurality of data packets comprises calculating the plurality of time delays aggregately for data packets received at all frequencies, translating the plurality of time delays to obtain a decoding key for decoding the encoded data in the data packets; and decoding the encoded data using the decoding key to obtain data.
Claim 10
Dependent Claim 121 words
A computer comprising: a processor; and a memory coupled to the processor, the memory storing instructions, which when executed by the processor, cause the computer to perform operations including: receiving a plurality of data packets including encoded data, wherein the plurality of data packets are received at different frequencies, determining a plurality of time delays between the plurality of data packets, wherein determining the plurality of time delays between the plurality of data packets comprises calculating the plurality of time delays aggregately for data packets received at all frequencies, translating the plurality of time delays to obtain a decoding key for decoding the encoded data in the data packets; and decoding the encoded data using the decoding key to obtain data.
Claim 11
Dependent Claim 19 words
The computer of claim 7 , wherein data packets received at different frequencies correspond to different portions of data.
Claim 12
Dependent Claim 35 words
The computer of claim 7 , wherein the decoding key includes one or more of a decryption key and location data indicating one or more locations of fake data in the plurality of data packets.
Claim 13
Dependent Claim 34 words
The computer of claim 7 , wherein the plurality of time delays are calculated aggregately for data packets received at all frequencies in an order determined by a timestamp assigned to each data packet.
Claim 14
Dependent Claim 35 words
The computer of claim 7 , wherein the plurality of time delays are calculated aggregately for data packets received at all frequencies in an order determined by packet location information associated with each data packet.
Claim 15
Independent Claim 125 words
A method comprising: receiving, by a computer, a plurality of data packets including encoded data; determining, by the computer, a plurality of time delays between the plurality of data packets; translating, by the computer, the plurality of time delays to obtain a decoding key for decoding the encoded data in the data packets, wherein translating the plurality of time delays includes: retrieving a mapping table, for each time delay in the plurality of time delays: correlating the time delay to an entry in the mapping table, and retrieving a value associated with the entry, and concatenating the retrieved values to form a string of characters corresponding to the decoding key; and decoding, by the computer, the encoded data using the decoding key to obtain data.
Claim 16
Independent Claim 125 words
A method comprising: receiving, by a computer, a plurality of data packets including encoded data; determining, by the computer, a plurality of time delays between the plurality of data packets; translating, by the computer, the plurality of time delays to obtain a decoding key for decoding the encoded data in the data packets, wherein translating the plurality of time delays includes: retrieving a mapping table, for each time delay in the plurality of time delays: correlating the time delay to an entry in the mapping table, and retrieving a value associated with the entry, and concatenating the retrieved values to form a string of characters corresponding to the decoding key; and decoding, by the computer, the encoded data using the decoding key to obtain data.
Claim 17
Dependent Claim 17 words
The method of claim 12 , wherein the plurality of data packets are received at different frequencies.
Claim 18
Dependent Claim 30 words
The method of claim 13 , wherein each of a plurality of devices are used to receive one or more of the plurality of data packets at a different frequency.
Claim 19
Dependent Claim 34 words
The method of claim 13 , wherein each of a plurality of receivers within a single device are used to receive one or more of the plurality of data packets at a different frequency.
Claim 20
Dependent Claim 34 words
The method of claim 13 , wherein determining the plurality of time delays between the plurality of data packets comprises calculating the plurality of time delays separately for data packets received at each frequency.
Claim 21
Dependent Claim 34 words
The method of claim 13 , wherein determining the plurality of time delays between the plurality of data packets comprises calculating the plurality of time delays aggregately for data packets received at all frequencies.
Claim 22
Dependent Claim 33 words
The method of claim 12 , wherein the decoding key includes one or more of a decryption key and location data indicating a location of fake data in the plurality of data packets.
Claim 23
Dependent Claim 12 words
The method of claim 12 , wherein the data is transaction data.
Claim 24
Dependent Claim 34 words
The method of claim 17 , wherein the plurality of time delays are calculated aggregately for data packets received at all frequencies in an order determined by a timestamp assigned to each data packet.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2021-05-14 2021-11-13 2022-05-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2025-05-14 2025-11-13 2026-05-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2029-05-14 2029-11-13 2030-05-15 $7700.00 Pending Window

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