USRE32207E
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide
Assignee: Nokia Bell Labs
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Filing: 1982-09-30
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Granted: 1986-07-15
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Expires: 2002-09-30
Abstract
Abstract The compounds TiSi 2 and TaSi 2 have been found to be suitable substitutes for polysilicon layers in semiconductor integrated circuits. Suitable conducting properties of the compounds are ensured by providing a relatively thin substrate of polysilicon.
Inventors
- 👤 Hyman J. Levinstein
- 👤 Shyam P. Murarka
- 👤 Ashok K. Sinha
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 11:07
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4451; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/01308; H10D64/0131; H10D64/60; H10D64/66; H10D64/661; H10D64/662; H10D64/663; H10P; H10P14/00; H10P14/40; H10P14/416; H10W20/01; H10W20/031; H10W20/064; H10W20/066
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
176 words
A method for making a semiconductor device from a wafer including a silicon .[.epitaxial surface.]. layer, said method comprising the steps of heating the wafer in an oxidizing atmosphere for a time and at a temperature for forming a first SiO 2 overlay, forming a first layer of doped polysilicon over said SiO 2 layer, .[.depositing.]. .Iadd.forming .Iaddend.on said polysilicon layer .Iadd.in a sintering step .Iaddend.a second layer of a .[.material.]. .Iadd.silicide .Iaddend.selected from the group consisting of .[.Ti and Ta sintering the material of said second layer at a temperature and for a time to form a silicide.]. TiSi 2 and TaSi 2 .[.of the material, respectively,.]. .Iadd.in a manner to avoid the formation of an oxide layer thereover, .Iaddend.heating the wafer for a time and at a temperature to form a second SiO 2 overlay while leaving a layer of polysilicon in excess of 1000 Angstroms therebeneath, etching a pattern in said second SiO 2 overlay, depositing an electrically-conducting material over said second SiO 2 overlay, and etching a pattern in said electrically-conducting material.
Claim 2
Independent Claim
176 words
A method for making a semiconductor device from a wafer including a silicon .[.epitaxial surface.]. layer, said method comprising the steps of heating the wafer in an oxidizing atmosphere for a time and at a temperature for forming a first SiO 2 overlay, forming a first layer of doped polysilicon over said SiO 2 layer, .[.depositing.]. .Iadd.forming .Iaddend.on said polysilicon layer .Iadd.in a sintering step .Iaddend.a second layer of a .[.material.]. .Iadd.silicide .Iaddend.selected from the group consisting of .[.Ti and Ta sintering the material of said second layer at a temperature and for a time to form a silicide.]. TiSi 2 and TaSi 2 .[.of the material, respectively,.]. .Iadd.in a manner to avoid the formation of an oxide layer thereover, .Iaddend.heating the wafer for a time and at a temperature to form a second SiO 2 overlay while leaving a layer of polysilicon in excess of 1000 Angstroms therebeneath, etching a pattern in said second SiO 2 overlay, depositing an electrically-conducting material over said second SiO 2 overlay, and etching a pattern in said electrically-conducting material.
Claim 3
Dependent Claim
28 words
A method in accordance with claim 1 in which said second layer comprises Ti and is sintered at about 900 degrees C. and heated in an oxygen atmosphere.
Claim 4
Dependent Claim
29 words
A method in accordance with claim 1 in which said second layer comprises Ta and is sintered at at least about 1000 degrees C. and is heated in steam.
References Cited (Backward Citations)
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| 3.5 Years (Year 4) | 1989-07-14 | 1990-01-13 | 1990-07-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-07-14 | 1994-01-13 | 1994-07-15 | $3760.00 | Window Closed / Lapsed |
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