Patent EP0193841A2 successfully refreshed from Google Patents.
EP0193841A2
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EP
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Semiconductor device and method of manufacturing the same
Assignee: Toshiba Corp
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Filing: 1986-02-25
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Granted: —
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Expires: 2006-02-25
Abstract
Abstract 57 A semiconductor device, and more particularly, an erasable programmable read only memory (EPROM) has a control gate electrode (104) and a floating gate electrode (107). The floating gate electrode (107) is formed on one side wall of the control gate electrode (104) through an insulating film (105).
Inventors
- 👤 Yoshihisa C/O Patent Division Mizutani
- 👤 Susumu C/O Patent Division Kohyama
- 👤 Koji C/O Patent Division Makita
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 09:47
CPC Classifications
H; H10; H10B; H10B41/00; H10B41/40; H10B41/42; H10B41/43; H10B41/48; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/685; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01326; H10D64/0133; H10D64/031; H10D64/035; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
184 words
A semiconductor device, comprising: a semiconductor substrate (101) of a first conductivity type; a first impurity diffusion region (109) of a second conductivity type, formed in a surface region of said semiconductor substrate; a second impurity diffusion region (110) of the second conductivity type, formed in the surface region of said semiconductor substrate (101) and separated from said first impurity diffusion region (109); a first insulating film (103) formed on the surface of said semiconductor substrate (101); and a floating gate electrode (107) and a control gate electrode (104) formed on that portion of said first insulating film (103) which corresponds to a portion of said semiconductor substrate (101) lying between said first and second impurity diffusion regions (109, 110) such that said floating gate electrode (107) and said control gate electrode (104) sandwich a second insulating film (105) therebetween; characterized in that said floating gate electrode (107) is formed on said portion of said first insulating film (103) and is positioned near said first impurity diffusion region (109), and said control gate electrode (104) is positioned near said second impurity diffusion region (110).
Claim 2
Dependent Claim
184 words
A semiconductor device, comprising: a semiconductor substrate (101) of a first conductivity type; a first impurity diffusion region (109) of a second conductivity type, formed in a surface region of said semiconductor substrate; a second impurity diffusion region (110) of the second conductivity type, formed in the surface region of said semiconductor substrate (101) and separated from said first impurity diffusion region (109); a first insulating film (103) formed on the surface of said semiconductor substrate (101); and a floating gate electrode (107) and a control gate electrode (104) formed on that portion of said first insulating film (103) which corresponds to a portion of said semiconductor substrate (101) lying between said first and second impurity diffusion regions (109, 110) such that said floating gate electrode (107) and said control gate electrode (104) sandwich a second insulating film (105) therebetween; characterized in that said floating gate electrode (107) is formed on said portion of said first insulating film (103) and is positioned near said first impurity diffusion region (109), and said control gate electrode (104) is positioned near said second impurity diffusion region (110).
Claim 3
Dependent Claim
58 words
A device according to claim 1, characterized in that said first impurity diffusion region is used as a drain region during a write operation and as a source region during a read operation, and said second impurity diffusion region is used as a source region during the write operation and as a drain region during the read operation.
Claim 4
Dependent Claim
51 words
A device according to claim 1, characterized in that a third impurity diffusion region, of the second conductivity type and having a lower impurity-concentration than said second impurity diffusion region, is formed adjacent to the side of said second impurity diffusion region which is opposite to said first impurity diffusion region.
Claim 5
Dependent Claim
46 words
A semiconductor device according to claim 1, characterized in that a fourth impurity diffusion region, of the first conductivity type and having a ' higher impurity concentration than said semiconductor substrate, is formed below said floating gate electrode and adjacent to said first impurity diffusion region.
Claim 6
Dependent Claim
37 words
A device according to claim 1, characterized in that a fifth impurity diffusion region, added with an impurity of the second conductivity type, is formed below said floating gate and adjacent to said first impurity diffusion region.
Claim 7
Dependent Claim
46 words
A device according to claim 5, characterized in that a sixth impurity diffusion region, of the first conductivity type and having a higher impurity concentration than said semiconductor substrate, is formed adjacent to said fifth impurity diffusion region and opposite to said second impurity diffusion region.
Claim 8
Independent Claim
187 words
A method of manufacturing a semiconductor device, comprising the steps of: (a) forming a firstinsulating film on a semiconductor substrate of a first conductivity type; (b) forming a control gate electrode on said first insulating film; (c) forming a second insulating film on a surface of said control gate electrode; (d) depositing a conductive material over the entire surface of the resultant structure to form a conductive material layer; (e) performing anisotropic etching of said conductive material layer to remove all of said conductive material layer except those portions corresponding to the side walls of said control gate electrode; (f) selectively removing a portion of said residual conductive material layer such that said residual material layer remains only on one of the side walls of said control gate electrode, and forming a floating gate electrode from the remaining portion of said residual conductive material layer; and (g) ion-implanting an impurity of the second conductivity type into said semiconductor substrate using said control gate electrode and said floating gate electrode as masks to form first and second impurity diffusion regions in a surface region of said semiconductor substrate.
Claim 9
Independent Claim
187 words
A method of manufacturing a semiconductor device, comprising the steps of: (a) forming a firstinsulating film on a semiconductor substrate of a first conductivity type; (b) forming a control gate electrode on said first insulating film; (c) forming a second insulating film on a surface of said control gate electrode; (d) depositing a conductive material over the entire surface of the resultant structure to form a conductive material layer; (e) performing anisotropic etching of said conductive material layer to remove all of said conductive material layer except those portions corresponding to the side walls of said control gate electrode; (f) selectively removing a portion of said residual conductive material layer such that said residual material layer remains only on one of the side walls of said control gate electrode, and forming a floating gate electrode from the remaining portion of said residual conductive material layer; and (g) ion-implanting an impurity of the second conductivity type into said semiconductor substrate using said control gate electrode and said floating gate electrode as masks to form first and second impurity diffusion regions in a surface region of said semiconductor substrate.
Claim 10
Dependent Claim
28 words
A method according to claim 7, further comprising the step of ion-implanting an impurity of the second conductivity type in said semiconductor substrate between the-steps (e) and (f).
Claim 11
Independent Claim
214 words
A method of manufacturing a semiconductor device, comprising the steps of: (a) forming a first insulating film on a semiconductor substrate of a first conductivity type; (b) forming first and second gate electrodes on said first insulating film; (c) forming second and third insulating films on said first and second gate electrodes, respectively; (d) depositing a conductive material over the entire surface of the resultant structure to form a conductive material layer; (e) performing anisotropic etching to remove said conductive layer except for portions thereof corresponding to the side walls of said first and second gate electrodes; (f) ion-implanting an impurity of the second conductivity type in said semiconductor substrate using said first and second gate electrodes and the residual portions of said conductive material layer as masks; (g) selectively removing said residual portions of the conductive material layer to leave said residual portions on only one side of the side walls of said first gate electrode, and forming a third gate electrode from a remaining portion of the conductive material layer; and (h) ion-implanting an impurity of the second conductivity type in said semiconductor substrate using said first, second, and third gate electrodes as masks to form first, second, third, and fourth impurity diffusion regions in a surface region of said semiconductor substrate.
Claim 12
Independent Claim
214 words
A method of manufacturing a semiconductor device, comprising the steps of: (a) forming a first insulating film on a semiconductor substrate of a first conductivity type; (b) forming first and second gate electrodes on said first insulating film; (c) forming second and third insulating films on said first and second gate electrodes, respectively; (d) depositing a conductive material over the entire surface of the resultant structure to form a conductive material layer; (e) performing anisotropic etching to remove said conductive layer except for portions thereof corresponding to the side walls of said first and second gate electrodes; (f) ion-implanting an impurity of the second conductivity type in said semiconductor substrate using said first and second gate electrodes and the residual portions of said conductive material layer as masks; (g) selectively removing said residual portions of the conductive material layer to leave said residual portions on only one side of the side walls of said first gate electrode, and forming a third gate electrode from a remaining portion of the conductive material layer; and (h) ion-implanting an impurity of the second conductivity type in said semiconductor substrate using said first, second, and third gate electrodes as masks to form first, second, third, and fourth impurity diffusion regions in a surface region of said semiconductor substrate.
Claim 13
Dependent Claim
48 words
A method according to claim 9, characterized in that said first gate electrode is a control gate electrode of a memory cell, said second gate electrode is a gate electrode of a MOS transistor, and said third gate electrode is a floating gate electrode of a memory cell.
References Cited (Backward Citations)
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