Patent EP0203516A2 successfully refreshed from Google Patents.
EP0203516A2
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Field effect transistor
Assignee: Hitachi Ltd
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Filing: 1986-05-21
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Granted: —
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Expires: 2006-05-21
Abstract
Abstract A field effect transistor comprises a first semiconductor layer to form source region (15), drain region (16) and a channel layer (12), and a second semiconductor layer (13) having reverse conduction type to that of the first semiconductor layer and being not totally depleted. The field effect transistor prevents the short channel effect and soft errors due to alpha -particles.
Inventors
- 👤 Yasunari Umemoto
- 👤 Nobuo Kotera
- 👤 Kiichi Ueyanagi
- 👤 Norikazu Hashimoto
- 👤 Nobutoshi Matsunaga
- 👤 Yasuo Wada
- 👤 Shoji Shukuri
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 11:22
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/351; H10D62/357; H10D30/00; H10D30/80; H10D30/87; H10D62/213; H10D62/221
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
96 words
A field effect transistor comprising: a semiconductor layer formed in a surface region of a compound semiconductor substrate (31) and including a source region (35) with first conduction type, a drain region (36) and an active region (32) with first conduction type formed between the source and drain regions (35, 36), a gate electrode (38) formed on the active region (32), and a semiconductor layer (33) of second conduction type reverse to the first conduction type, being not totally depleted and formed under at least one of said source, drain and active regions (35, 36, 32).
Claim 2
Dependent Claim
96 words
A field effect transistor comprising: a semiconductor layer formed in a surface region of a compound semiconductor substrate (31) and including a source region (35) with first conduction type, a drain region (36) and an active region (32) with first conduction type formed between the source and drain regions (35, 36), a gate electrode (38) formed on the active region (32), and a semiconductor layer (33) of second conduction type reverse to the first conduction type, being not totally depleted and formed under at least one of said source, drain and active regions (35, 36, 32).
Claim 3
Dependent Claim
37 words
The field effect transistor of claim 1, wherein the carrier concentration of the semiconductor layer (33) not totally depleted is 1 x 10 15 cm -3 or more, preferably 1 x 10 16 cm -3 or more.
Claim 4
Dependent Claim
26 words
The field effect transistor of claim 1 or 2, wherein an electrode (37) is electrically connected to the semiconductor layer (33) not totally depleted. (Fig. 3)
Claim 5
Dependent Claim
36 words
The field effect transistor of claim 3, wherein a semiconductor layer (41) of the second conduction type with low resistance is interposed between the semiconductor layer (33) not totally depleted and the electrode (37). (Fig. 4)
Claim 6
Dependent Claim
55 words
The field effect transistor of claim 1 or 2, wherein the semiconductor layer not totally depleted is composed of first and second semiconductor layers (117, 118), the first semiconductor layer (117) contacting with the active region (112) and the second semiconductor layer (118) having a higher concentration than the first semiconductor layer (117). (Fig. 11)
Claim 7
Dependent Claim
22 words
The field effect transistor of any of claims 1 to 5, wherein the compound semiconductor substrate (31) is a semi-insulating GaAs substrate.
Claim 8
Dependent Claim
37 words
The field effect transistor of any of claims 1 to 6, wherein at least one substance selected from the group consisting of Be, Mg, C and Zn is doped to the semiconductor layer (33) not totally depleted.
Claim 9
Dependent Claim
27 words
The field effect transistor of any of claims 1 to 7, wherein the semiconductor layer (33) not totally depleted has a thickness of 100 nm or more.
Claim 10
Dependent Claim
40 words
The field effect transistor of claim 3, wherein the source region (55), the drain region (56) and the active region (52) are formed in a surface region of the compound semiconductor substrate (53) having the second conduction type. (Fig. 7)
Claim 11
Dependent Claim
25 words
The field effect transistor of claim 9, wherein the electrode (57) is formed on a rear surface of the compound semiconductor substrate (53). (Fig. 7)
Claim 12
Dependent Claim
44 words
The field effect transistor cf any of claims 1 to 8, wherein the semiconductor layer (33) not totally depleted is continuously formed in contacting with the lower side of the source region (35), the active layer (32) and the drain region (36). (Fig. 3)
Claim 13
Dependent Claim
34 words
The field effect transistor of claim 11, wherein the semiconductor layer (63) not totally depleted is formed so as to expose a part of the lower side of the drain region (36). (Fig. 6)
Claim 14
Dependent Claim
33 words
The field effect transistor of claim 1, wherein the semiconductor layer (90) not totally depleted is formed in contacting with a part of the lower side of the active layer (82). (Fig. 8)
References Cited (Backward Citations)
No citation records indexed.
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