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EP0304540A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

A method of initializing a data processing system

Assignee: Digital Equipment Corp
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Filing: 1982-10-05
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Granted: —
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Expires: 2002-10-05
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Abstract

Abstract An interface apparatus between a pair of processors such as a host processor (70) and a processor (31) in an intelligent controller (30) for mass storage devices (40) has a multi-step initialization procedure to check the integrity of the communications path between host and controller. In particular, the communications path includes a register and information is written to and read from the register to verify correct operation of each bit of the register. As part of the write-read process, certain host-specific parameters, such as the sizes of the ring-­type queues and their starting addresses is sent from the host to the controller. Capability is shown also for allowing repeated access to the same host memory location for successive reads, writes, or any combination of the two. With bus adapters which impose rigid sequencing rules which do not allow reads and writes to be mixed, the adapter channel is purged between successive accesses to the same location. The port requests the purge and it is executed by the host.

Inventors

  • 👤 Barry L. Rubinson
  • 👤 Edward A. Gardner
  • 👤 William A. Grace
  • 👤 Richard F. Lary
  • 👤 Dale R. Keck

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-26 11:31
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/44; G06F9/4401; G06F9/4405; G06F13/00; G06F13/10; G06F13/12; G06F13/124; G06F13/126; G06F15/00; G06F15/16; G06F15/163; G06F15/173; G06F15/17356; G06F15/177

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 140 words
A method of initializing a data processing system which includes a host processor (70), mass storage means (40), mass storage control means (30) for controlling the operation of the mass storage means, and bus means (60) for interconnecting the host processor and the mass storage control means to enable communication therebetween, a register (38) connected to the bus means and through which various information may be transmitted between the host processor and the mass storage control means, and said register having multiple locations for storing bit values, said method comprising the steps of: (a) confirming the proper operation of the register locations by writing thereto and reading therefrom (326, 350, 372, 374, 386, 398, 405); and (b) the host processor sending to the mass storage means, via the register, values for predetermined parameters characteristic of the host (336, 366, 380).
Claim 2
Independent Claim 140 words
A method of initializing a data processing system which includes a host processor (70), mass storage means (40), mass storage control means (30) for controlling the operation of the mass storage means, and bus means (60) for interconnecting the host processor and the mass storage control means to enable communication therebetween, a register (38) connected to the bus means and through which various information may be transmitted between the host processor and the mass storage control means, and said register having multiple locations for storing bit values, said method comprising the steps of: (a) confirming the proper operation of the register locations by writing thereto and reading therefrom (326, 350, 372, 374, 386, 398, 405); and (b) the host processor sending to the mass storage means, via the register, values for predetermined parameters characteristic of the host (336, 366, 380).
Claim 3
Dependent Claim 32 words
The method of claim 1 further including the step of: (c) the mass storage means sending to the host, via the register, data and error information relating to the initialization process (398).
Claim 4
Dependent Claim 24 words
The method of claim 2 wherein in step (b) the host processor writes to said register values for predetermined parameters characteristic of the host.
Claim 5
Dependent Claim 25 words
The method of claim 2 or 3 wherein in step (b) the mass storage control means reads said register to obtain therefrom said parameter values.
Claim 6
Independent Claim 88 words
The method of claims 2 to 4 wherein in step (c) the mass storage control means writes to said register at least a portion of said parameter values, in different locations than had been used by the host in writing said parameter values to the register, and the host reads said register and compares the parameter values written to the register by the mass storage control means with the parameter values written to the register by the host, to confirm proper operation of bit locations in the register.
Claim 7
Dependent Claim 27 words
The method of claim 5 wherein the register is in the input/output page of host address space but physically is part of the mass storage control means.
Claim 8
Dependent Claim 40 words
The method of claim 5 or 6 wherein said writing and reading steps are performed a sufficient number of times and with a sufficient number of parameters so as to confirm proper operation of all bit locations in the register.

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