Patent US5751885A successfully refreshed from Google Patents.
Patent EP0320099A2 successfully refreshed from Google Patents.
EP0320099A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Multi-cache data storage system
Assignee: Fujitsu Services Ltd
•
Filing: 1988-10-17
•
Granted: —
•
Expires: 2008-10-17
Abstract
Abstract A multi-cache data storage system has a number of cache units and a main memory. The caches are addressed by a virtual address. When data is updated in one of the caches, the virtual address is translated into a physical address and sent to the main memory over a bus, along with the updated data value. Each cache continuously monitors the bus for updates from other caches and checks whether it holds a data item corresponding to the physical address. If so, the data item is updated or invalidated, so as to ensure cache coherency.
Inventors
- 👤 David Paul Crane
- 👤 Terence Michael Cole
- 👤 Geoffrey Poskitt
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 13:22
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/10; G06F12/1027; G06F12/1045; G06F12/1063; G06F12/0802; G06F12/0806; G06F12/0815; G06F12/0831
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
105 words
A multi-cache data storage system comprising a plurality of cache units (12) connected by a bus (13) to a main memory (11), wherein each cache unit comprises: (a) a data cache (20), addressed by a virtual address, (b) means (25) for translating the virtual address into a physical address, and for transmitting the physical address over the bus to the main memory, and (c) means (27) responsive to a physical address received over the bus, for determining whether a data item corresponding to that physical address is present in the data cache, and, if so, updating or invalidating that data item in the data cache.
Claim 2
Dependent Claim
105 words
A multi-cache data storage system comprising a plurality of cache units (12) connected by a bus (13) to a main memory (11), wherein each cache unit comprises: (a) a data cache (20), addressed by a virtual address, (b) means (25) for translating the virtual address into a physical address, and for transmitting the physical address over the bus to the main memory, and (c) means (27) responsive to a physical address received over the bus, for determining whether a data item corresponding to that physical address is present in the data cache, and, if so, updating or invalidating that data item in the data cache.
Claim 3
Dependent Claim
91 words
A system according to Claim 1 wherein the means for determining whether a data item is present in the data cache comprises (a)a tag memory (30) for holding a physical address tag for each data item in the data cache, (b)means for comparing the physical address received over the bus with the physical address tags in the tag memory and, if a match is detected, producing a virtual address corresponding to that physical address, and (c)means for using the produced virtual address invalidate the corresponding data item in the data cache.
Claim 4
Dependent Claim
175 words
A system according to Claim 2 wherein (a)the virtual address comprises first, second and third portions, the first portion being used directly to provide a second portion of the physical address without translation and the second and third portions being translated to provide a second portion of the physical address, the first and second portions of the virtual address being used to address the data cache, (b)when a data item is loaded into the data cache, the first and second portions of the virtual address are used to access the tag memory and the second portion of the physical address is written into the tag memory as a physical address tag, (c)when a physical address is received over the bus, the first portion of the physical address is used to select a set of tags in the tag memory and these tags are compared in parallel with the second part of the physical address, (d)the result of the comparison is encoded to reconstruct the second portion of the virtual address corresponding to the physical address.
Claim 5
Dependent Claim
70 words
A system according to Claim 3 wherein the tag memory (30) comprises a plurality of sections each each of which holds a plurality of tags, and wherein, when data is loaded into the data cache, the first portion of the virtual address of that item is used to address all the sections of the tag memory in parallel, and the second portion is used to select one of the sections.
Claim 6
Dependent Claim
51 words
A system according to Claim 4 wherein, when a physical address is received over the bus, the first portion of that address is used to address all the sections of the tag memory in parallel, and the second portion of the physical address is compared with all the portions in parallel.
Claim 7
Dependent Claim
16 words
A multi-processor data processing system including a multi-cache data storage system according to any preceding claim.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.