Patent EP0404553A1 successfully refreshed from Google Patents.
EP0404553A1
Expired / Lapsed
EP
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Semiconductor memory device
Assignee: Sharp Corp
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Filing: 1990-06-20
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Granted: —
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Expires: 2010-06-20
Abstract
Abstract A semiconductor memory device which comprises a plurality of memory cells each comprising a transistor formed on a surface of a semiconductor substrate and having one terminal, and a capacitor formed on the semiconductor substrate and having first and second electrodes, said first electrode being connected with one terminal of the transistor. The first electrode of the capacitor is comprised of a principle portion of either generally rectangular cubic configuration or generally cup-shaped configuration, a peripheral portion spaced from and surrounding a peripheral side wall of the principle portion and a bottom portion connecting an end of the principle portion with an end of the peripheral portion. On the other hand, the second electrode of the capacitor is comprised of respective portions confronting the principle portion, the peripheral portion and the bottom portion of the first electrode.
Inventors
- 👤 Katsuji Iguchi
- 👤 Seizo Kakimoto
- 👤 Naoyuki Shinmura
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 13:16
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/31; H10B12/318; H10B12/01; H10B12/02; H10B12/03; H10B12/033
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
137 words
A semiconductor memory device which comprises a plurality of memory cells, each of said memory cells comprising: a transistor formed on a surface of a semiconductor substrate and having one terminal; and a capacitor formed on the semiconductor substrate and having first and second electrodes, said first electrode being connected with one terminal of the transistor; said first electrode of the capacitor being comprised of a principle portion of either generally cylindrical configuration or generally cup-shaped configuration, a peripheral portion spaced from and surrounding a peripheral side wall of the principle portion and a bottom portion connecting an end of the principle portion with an end of the peripheral portion; and said second electrode of the capacitor being comprised of respective portions confronting the principle portion, the peripheral portion and the bottom portion of the first electrode.
Claim 2
Dependent Claim
137 words
A semiconductor memory device which comprises a plurality of memory cells, each of said memory cells comprising: a transistor formed on a surface of a semiconductor substrate and having one terminal; and a capacitor formed on the semiconductor substrate and having first and second electrodes, said first electrode being connected with one terminal of the transistor; said first electrode of the capacitor being comprised of a principle portion of either generally cylindrical configuration or generally cup-shaped configuration, a peripheral portion spaced from and surrounding a peripheral side wall of the principle portion and a bottom portion connecting an end of the principle portion with an end of the peripheral portion; and said second electrode of the capacitor being comprised of respective portions confronting the principle portion, the peripheral portion and the bottom portion of the first electrode.
Claim 3
Dependent Claim
26 words
The device as claimed in Claim 1, wherein the number of each of the peripheral portion and the bottom portion of said first electrode is plural.
Claim 4
Independent Claim
204 words
A method of making the semiconductor memory device, which comprises the steps of: forming an electroconductive thick film as a material for a first electrode of the capacitor after a transistor has been formed on a surface of a semiconductor substrate; forming a side wall of a principle portion of the capacitor by removing a portion of the electroconductive thick film excluding a region thereof on which the principle portion of the capacitor is to be formed, while leaving a thin film portion; forming a peripheral side wall made of material etchable selectively relative to the electroconductive thick film and surrounding a periphery of a side wall of the principle portion in contact therewith; forming a peripheral portion made of electroconductive material resistant to a corrosive used for the material for the peripheral side wall, which peripheral portion surrounds the peripheral side wall in contact therewith and having an end portion connected therethrough to the thin film portion; forming a bottom portion by removing a portion of the thin film on a region outside the peripheral portion; and removing the peripheral side wall by the use of a corrosive, whereby an insulating layer and the second electrode are sequentially formed over the first electrode.
Claim 5
Independent Claim
204 words
A method of making the semiconductor memory device, which comprises the steps of: forming an electroconductive thick film as a material for a first electrode of the capacitor after a transistor has been formed on a surface of a semiconductor substrate; forming a side wall of a principle portion of the capacitor by removing a portion of the electroconductive thick film excluding a region thereof on which the principle portion of the capacitor is to be formed, while leaving a thin film portion; forming a peripheral side wall made of material etchable selectively relative to the electroconductive thick film and surrounding a periphery of a side wall of the principle portion in contact therewith; forming a peripheral portion made of electroconductive material resistant to a corrosive used for the material for the peripheral side wall, which peripheral portion surrounds the peripheral side wall in contact therewith and having an end portion connected therethrough to the thin film portion; forming a bottom portion by removing a portion of the thin film on a region outside the peripheral portion; and removing the peripheral side wall by the use of a corrosive, whereby an insulating layer and the second electrode are sequentially formed over the first electrode.
Claim 6
Dependent Claim
17 words
The method as claimed in Claim 3, wherein the third and fourth mentioned forming steps are repeated.
Claim 7
Dependent Claim
113 words
A semiconductor memory device having a plurality of memory cells, each comprising a transistor formed on a surface of a semiconductor substrate and a capacitor, also formed on the substrate, and having a first electrode connected to a terminal of the transistor, said first electrode including a central portion which has a peripheral side wall, and a peripheral portion which surrounds said central portion, is spaced by a peripheral groove-like gap from said peripheral sidewall, and is connected at the bottom of the gap to the central portion, said capacitor having a second electrode which includes respective portions in said gap facing said peripheral sidewall of said central portion and said peripheral portion.
Claim 8
Dependent Claim
113 words
A semiconductor memory device having a plurality of memory cells, each comprising a transistor formed on a surface of a semiconductor substrate and a capacitor, also formed on the substrate, and having a first electrode connected to a terminal of the transistor, said first electrode including a central portion which has a peripheral side wall, and a peripheral portion which surrounds said central portion, is spaced by a peripheral groove-like gap from said peripheral sidewall, and is connected at the bottom of the gap to the central portion, said capacitor having a second electrode which includes respective portions in said gap facing said peripheral sidewall of said central portion and said peripheral portion.
References Cited (Backward Citations)
EP0295709A2
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EP0317199A2
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