Patent EP0432774A2 successfully refreshed from Google Patents.
EP0432774A2
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EP
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Processor architecture with decoupled instruction fetching
Assignee: SK Hynix America Inc
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Filing: 1990-12-13
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Granted: —
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Expires: 2010-12-13
Abstract
Abstract A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later. For branches of executed instructions that are later invalidated, the results of the executed instructions are flushed from provisional storage and the initial instruction which previously executed at the beginning of a branch on predicted dependencies is re-executed on the actual data that subsequently became available, and all subsequent instructions in such branch are also re-executed on the basis of dependencies actually available from execution of previous instructions in such branch.
Inventors
- 👤 Valeri Popescu
- 👤 Merle A. Schultz
- 👤 Gary A. Gibson
- 👤 John E. Spracklen
- 👤 Bruce D. Lightner
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 10:28
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3854; G06F9/3856; G06F9/3802; G06F9/3836; G06F9/3838; G06F9/384; G06F9/3842; G06F9/3844; G06F9/3858; G06F9/3861; G06F9/3863; G06F9/3865; G06F9/3885
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
140 words
A data processing system for processing information in response to a series of instructions that control arithmetic operations on the information, the data processing system comprising: register means for storing information to be executed; arithmetic means for executing on information in the register means in response to instructions supplied thereto and for supplying execution results to the register means; fetching means for continuously fetching instructions from the series of instructions to control execution by the arithmetic means on information contained in the register means; shelving means disposed to receive fetched instructions, in the order fetched, for which all information required for execution is not stored in the register means; and means responsive to the oldest instruction in the shelving means for which all information required for execution is present in the register means for controlling execution of said oldest instruction.
Claim 2
Independent Claim
120 words
A method of processing information in a computer system in response to a series of instructions that control arithmetic operations on the information, the method comprising; storing the information on which arithmetic operations are to be executed; executing arithmetic operations in response to an instruction for which all information required for execution is stored; storing the results of execution; continuously fetching instructions from a series of instructions to control execution of instructions for which all information required for execution is stored; sequentially storing fetched instructions, in the order fetched, for which all information required for execution is not stored; and retrieving the oldest stored fetched instruction for which all information required for execution is stored for controlling the execution thereof.
Claim 3
Dependent Claim
213 words
A data processing system for processing information in response to a series of instructions including instructions that control arithmetic operations on the information, the date processing system comprising: register means for storing information to be operated on; fetching means for continuously fetching instructions from the series of instructions; shelving means disposed to receive fetched instructions and to store multiple such instructions in the order fetched; temporary storage means disposed to receive the results of execution of instructions and capable of storing the result of the execution of every instruction in the shelving means; arithmetic means for executing on information in one of the register means or the temporary storage means in response to instruction supplied thereto and for supplying execution results to the temporary storage means; scheduling means for continuously selecting instructions in the shelving means for which all information required for execution is stored in one of the register means or the temporary storage means and for supplying those instructions to the arithmetic means without regard to the order in which those instructions were fetched; and means responsive to the oldest instruction in the shelving means for copying results of the execution of that instruction from the temporary storage means into the register means and removing that instruction from the shelving means.
Claim 4
Dependent Claim
22 words
A data processing system according to claim 3 in which the shelving means also stores a unique instruction identifier with each instruction.
Claim 5
Dependent Claim
25 words
A data processing system according to claim 3 in which the temporary storage means also stores a unique result identifier with each instruction execution result.
Claim 6
Dependent Claim
40 words
A data processing system according to claim 3 in which the result identifier stored in the temporary storage means with the result of executing an instruction is identical to the instruction identifier stored with that instruction in the shelving means.
Claim 7
Dependent Claim
43 words
A data processing system according to claim 5 in which the shelving means stores with each instruction for which information needed to execute is stored in the temporary storage means, the unique result identifier(s) stored with that information in that temporary storage means.
Claim 8
Dependent Claim
118 words
A data processing system according to claim 3 in which: the register means consists of an array of registers, each register having a unique register number; each arithmetic instruction in the series of instructions contains a destination, which is a register number; each arithmetic instruction in the series of instructions contains at least one operand register number; the scheduling means determines that all information required for executing an arithmetic instruction is stored just when, for each operand contained in that instruction, either no instruction in the shelving means has a destination equal to that operand or the results of the most-recently-fetched instruction in the shelving means whose destination equals that operand are stored in the temporary storage means.
Claim 9
Dependent Claim
61 words
A data processing system according to claim 8 in which, for each operand of each instruction stored in the shelving means for which there is a set of instructions in the shelving means whose destinations equal said operand of said instruction, the shelving means stores a locker, equal to the unique identifier of the most recently fetched instruction from that set.
Claim 10
Dependent Claim
204 words
A data processing system according to claim 9 in which: the shelving means stores a locked bit with each operand of each instruction stored in the shelving means, which bit is a 1 if and only if there is a set of instructions in the shelving means that were fetched prior to said instruction and whose destinations equal said operand of said instruction, and the results of the most recently fetched instruction in said set of instructions are not stored in the temporary storage means; the arithmetic means accepts an instruction identifier together with each instruction and will return that identifier with the result of executing that instruction; the scheduling means supplies, with each instruction to the arithmetic means, the unique instruction identifier stored with that instruction in the shelving means; the shelving means accepts the unique instruction identifier returned by the arithmetic means with each result, and sets to 0 the locked bit stored by the shelving means with every operand of every instruction, the locker of which operand equals the returned identifier; and the scheduling means determines that all information required for executing an arithmetic instruction is stored just when, for each operand contained in that instruction, the locked bit is 0.
Claim 11
Dependent Claim
71 words
A data processing system according to claim 10 in which the scheduling means determines for each instruction supplied from the shelving means to the arithmetic means, whether any information needed for that instruction to execute that was once stored in the temporary storage means is still there, by comparing the age of the locker of each operand of said instruction against the age of the oldest instruction in the shelving means.
Claim 12
Dependent Claim
25 words
A data processing system according to claim 3 in which there are multiple arithmetic means which may supply results to the temporary storage means simultaneously.
Claim 13
Dependent Claim
56 words
A data processing system according to claim 12 in which the scheduling means is capable of simultaneously supplying each of several of the arithmetic means with a different instruction from the shelving means, along with the information needed to execute each of said different instructions stored in either the register means or the temporary storage means.
References Cited (Backward Citations)
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