Gate array

Abstract

Abstract PURPOSE:To enable to shorten the delay time in a unit cell in some cases by enabling to freely elongating laterally and longitudinally the shape of the cell wighout influence to other wirings. CONSTITUTION:BC1, BC2 are basic cells which belong to normal type basic cells BL1, BL2. BCL is a basic cell which belongs to a large type basic cell BLL, a white circle is a contacting portion of aluminum wirings LA of the first layer with a semiconductor substrate, and R1, R2, R3 are regions in which amluminum wirings LA for forming inverters are composed. In this circuit, there is a region S2 between R1 and R2, and a region S2 between R2 and R3 of the portion in which the LA are not entirely formed. Accordingly, since there exists a region for passing other wirings except wirings for connecting between the cells, the cell can be freely elongated laterally and longitudinally without influence to the other wirings. Further, a large type basic cell is applied to the circuit in which a heavy load in the cell is connected, thereby reducing the delay time in the entire unit cell.

Inventors

• 👤 Shinji Sato
• 👤 佐藤　眞司

Bibliographic Details