Patent US3575741A successfully refreshed from Google Patents.
US3575741A
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US
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Method for producing semiconductor integrated circuit device and product produced thereby
Assignee: AT&T Inc
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Filing: 1968-02-05
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Granted: 1971-04-20
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Expires: 1988-02-05
Abstract
Abstract IN THE FABRICATION OF A JUNCTION-ISOLATED SEMICONDUCTOR INTERGRATED CIRCUIT STRUCTURE, A PLURALITY OF N-TYPE BURIED LAYERS ARE DIFFUSED INTO A P-TYPE SUBSTRATE, AND A THIN PTYPE EPITAXIAL LAYER IS GROWN THEREOVER. N-TYPE DEEP CONTACT ZONES ARE DIFFUSED COMPLETELY THROUGH THE EPITAXIAL LAYER TO INTERSECT SEPARATE ONES OF THE N-TYPE BURIED LAYERS, THUS DEFINING BASE AREAS. P-TYPE IMPURITIES ARE THEN DIFFUSED NON-SELECTIVELY INTO THE ENTIRE SURFACE OF THE PTYPE EPITAXIAL LAYER TO FORM A GRADED IMPURITY PROFILE FOR THE BASE ZONE. N-TYPE EMITTER ZONES ARE THEN DIFFUSED SELECTIVELY INTO THE SURFACE.
Inventors
- 👤 Bernard T Murphy
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 22:46
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/021; H10D; H10D84/00; H10D84/60; H10D84/611; H10D84/613; H10D84/615; H10W10/00; H10W10/01; H10W10/031; H10W10/30; Y; Y10; Y10S; Y10S148/00; Y10S148/036; Y10S148/037; Y10S148/085; Y10S438/00; Y10S438/914; Y10S438/921
Claims Analysis
Total Claims: 0
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References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-04-19 | 1974-10-19 | 1975-04-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-04-19 | 1978-10-19 | 1979-04-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-04-19 | 1982-10-19 | 1983-04-20 | $7700.00 | Window Closed / Lapsed |