Patent US3649852A successfully refreshed from Google Patents.
US3649852A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Trigger circuit utilizing a pair of logic gates coupled in parallel current paths
Assignee: Individual
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Filing: 1971-03-10
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Granted: 1972-03-14
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Expires: 1991-03-10
Abstract
Abstract A triggering circuit for producing an oscilloscope sweep trigger signal employing a pair of parallel current paths, one path including one input of a first logic gate and a current control device coupled thereto and the second path including one input of a second logic gate and a second current control device coupled thereto. Feedback circuits couple the output of each gate to said input of each gate for regenerative feedback. A reset control signal is coupled to a second input of each gate. The output of said one gate is coupled to a third input of said second gate. A sync signal controls each of said current control devices to control the current through each path for operating said gates in sequence, said first gate operating at a preselected level in one half cycle of said sync signal and said second gate operating at a preselected level in the next half cycle of said sync signal to produce said triggering signal.
Inventors
- 👤 Thomas K Bohley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 06:46
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/027; H03K3/037; G; G01; G01R; G01R13/00; G01R13/20; G01R13/22; G01R13/32; H03K3/26; H03K3/28; H03K3/281; H03K3/286; H03K3/2893; H03K3/2897
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
215 words
A triggering circuit comprising first and second logic gates each having an output and a plurality of inputs; a first current path coupled to one input of said first logic gate, said first current path including a first current control device for controlling the current in said path; a second current path coupled to one input of said second logic gate, said second current path including a second current control device for controlling the current in said second path; a current source coupled in common to said two current paths; a source of a sync signal variable about two amplitude levels coupled to both of said current control devices adapted to turn on one of said current control devices at one amplitude level and to turn on the other of said current control devices at the other amplitude level; a first feedback circuit coupled between the output of said first gate and said one input of said first gate; a second feedback circuit coupled between the output of said second gate and said one input of said second gate; means for coupling a reset signal to a second input of each of said logic gates; and circuit means coupling the outpuT of said one logic gate to a third input of said second logic gate.
Claim 2
Dependent Claim
215 words
A triggering circuit comprising first and second logic gates each having an output and a plurality of inputs; a first current path coupled to one input of said first logic gate, said first current path including a first current control device for controlling the current in said path; a second current path coupled to one input of said second logic gate, said second current path including a second current control device for controlling the current in said second path; a current source coupled in common to said two current paths; a source of a sync signal variable about two amplitude levels coupled to both of said current control devices adapted to turn on one of said current control devices at one amplitude level and to turn on the other of said current control devices at the other amplitude level; a first feedback circuit coupled between the output of said first gate and said one input of said first gate; a second feedback circuit coupled between the output of said second gate and said one input of said second gate; means for coupling a reset signal to a second input of each of said logic gates; and circuit means coupling the outpuT of said one logic gate to a third input of said second logic gate.
Claim 3
Dependent Claim
60 words
A triggering circuit as claimed in claim 1 wherein each of said logic gates comprises a plurality of input transistors coupled in parallel in one current path of the gate, a reference transistor coupled in a second current path in the gate parallel to said one current path, and an output transistor coupled to one of said latter current paths.
Claim 4
Dependent Claim
35 words
A triggering circuit as claimed in claim 2 wherein said feedback circuits for each gate comprise a resistance circuit coupling the output of said output transistor with the base of one of said input transistors.
Claim 5
Dependent Claim
27 words
A triggering circuit as claimed in claim 2 wherein said one logic gate comprises two input transistors and wherein said second logic gate comprises three input transistors.
Claim 6
Dependent Claim
35 words
A triggering circuit as claimed in claim 1 wherein each of said current control devices comprises a transistor with its emitter-collector circuit in said current path and its base coupled to said sync signal source.
Claim 7
Dependent Claim
60 words
A triggering circuit as claimed in claim 5 wherein each of said logic gates comprises a plurality of input transistors coupled in parallel in one current path of the gate, a reference transistor coupled in a second current path in the gate parallel to said one current path, and an output transistor coupled to one of said latter current paths.
Claim 8
Dependent Claim
35 words
A triggering circuit as claimed in claim 6 wherein said feedback circuits for each gate comprise a resistance circuit coupling the output of said output transistor with the base of one of said input transistors.
Claim 9
Dependent Claim
27 words
A triggering circuit as claimed in claim 6 wherein said one logic gate comprises two input transistors and wherein said second logic gate comprises three input transistors.
References Cited (Backward Citations)
US3446989A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-03-14 | 1975-09-13 | 1976-03-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-03-14 | 1979-09-13 | 1980-03-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-03-14 | 1983-09-13 | 1984-03-14 | $7700.00 | Window Closed / Lapsed |