Fabrication of integrated semiconductor devices by electrochemical etching
Abstract
Abstract Grid-like zones of P or N type high conductivity material are formed in the surface of an N type higher resistivity epitaxially deposited layer on a high conductivity substrate of a body of silicon semiconductor material. The surface of the N type layer then is covered with a dielectric film of silicon nitride and a support layer of polycrystalline silicon. The body then is immersed in a suitable bath and subjected to an electrochemical etch which removes the high conductivity substrate and, in line with the grid-like zones, channels are etched through the N type layer and the grid-like zones, leaving completely isolated blocks of the N type layer affixed to a common support member. Following such shaping of isolated blocks of the N type layer integrated circuits are fabricated by applying insulating films over the exposed surface of the block and otherwise carrying out wellknown EPIC-type fabrication procedures.
Inventors
- 👤 Ronald Lee Meek
Bibliographic Details
Claims Analysis
Total Claims: 4References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1975-05-09 | 1975-11-08 | 1976-05-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-05-09 | 1979-11-08 | 1980-05-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-05-09 | 1983-11-08 | 1984-05-09 | $7700.00 | Window Closed / Lapsed |